One design fits all

Although board designers have for years used FPGAs (field-programmable gate arrays) to interconnect system components, the latest high-density devices are powerful enough to also replace the processors, memory, custom logic, and many peripherals of a typical embedded-system project. These new system-level or platform FPGAs allow designers to create standard hardware designs that they can tweak as new requirements emerge or that they can reconfigure for different applications. For high-performance projects with parallel computation requirements, a single platform-FPGA-board design may replace a chassis full of conventional computer boards. Yet, with the amazing capabilities of these new devices, designers must carefully analyze performance, power, and cost boundaries to determine when FPGA designs make sense.

In their simplest form, FPGAs are 2-D arrays of logic blocks with electrically programmable interconnections. Although the exact makeup differs for each FPGA vendor, logic blocks consist of transistor pairs, combinations of basic logic gates, multiplexers, or multiple-input look-up tables. Users can configure both the interconnection paths and the functions of each logic block by designating the value of built-in programming elements. Logic blocks can be a simple transistor, groups of combinational and sequential logic functions, or a complex microprocessor.

FPGA vendors have adopted several techniques for programming the interconnections and logic blocks. One of the simplest methods, the antifuse, creates a low-resistance link when you apply a high voltage across its terminals. The antifuse consumes little area but requires extra circuitry for programming. Advantages include low series resistance and low parasitic capacitance, but the main disadvantage is that an antifuse FPGA is a write-once device and therefore not reconfigurable. Static-RAM cells also enable or disable pass transistors to program FPGA topology. Although at least five transistors are necessary to implement a memory cell, SRAM technology provides fast reprogrammability. SRAM-based FPGAs also require an external boot device to set the memory on power-up. Designers also use EPROM, EEPROM, and flash-memory technologies to program FPGAs with the advantages of reprogrammability and elimination of the external boot-up device. Programmable FPGA interconnections are generally slower than the permanent wiring a custom chip uses. Because the pass transistor is not a zero-resistance switch and FPGA interconnections are somewhat longer than necessary for a custom chip, the extra capacitance and resistance reduce bandwidth.

All FPGA vendors provide or offer compatibility with free or low-cost design-automation tools to capture system configurations. Designers may describe all or portions of their FPGA circuitry using an HDL (hardware-description language), such as Verilog or VHDL. Once the designer has defined the design, additional tools implement the design on a given FPGA. This process includes power and configuration optimizations; hardware partitioning, placement, and interconnection routing follow the optimizations. The output of the design-implementation phase is a bit-stream file.

The design-verification phase employs a simulator to check the design's functions and maximum clock frequency. The final stage is to load the design onto the target FPGA for testing in the actual hardware environment.

The growing complexity and density of FPGA products have created a market for modular functional blocks of HDL code that designers can incorporate into their products. These functional blocks, commonly referred to as IP (intellectual-property) cores, allow manufacturers to reuse circuit elements from previous designs or simply purchase functions from an outside source. Examples of IP cores include UARTs, DSPs, Ethernet interfaces, bus interfaces, and even microcontrollers. Manufacturers physically implement hard-IP cores directly onto the silicon of an FPGA; they provide soft cores as HDL code that is portable across multiple devices.

IP cores are available from FPGA vendors; from third-party suppliers; or as freely available open-source HDL code from sources, such as www.opencores.org. Commercial IP is usually fee-based and includes documentation, verification tools, and support. According to Martin Mason, director of flash-product marketing at Actel, "We have two business models for our IP, depending on customer needs. We offer a per-use or site license that varies from as little as $200 to more than $10,000, depending on the complexity of the property. Additionally, we offer a hard-IP core for an ARM-based microcontroller that you order by special part number, and the per-unit cost of the part includes the fee for the IP."

Major FPGA vendors Xilinx and Altera, which hold more than 80% of the market share, provide extensive IP libraries for their products. Although smaller, more specialized vendors, such as Lattice, Actel, Cypress, Quicklogic, and Atmel, share the rest of the market, they also provide IP libraries. For example, Xilinx recently upgraded its popular MicroBlaze soft-IP-core processor to deliver 200-MHz performance in Virtex-4 FPGAs. The 32-bit RISC core includes an optional IEEE-754-compatible floating-point unit that allows embedded-system developers to accelerate system performance by as much as 120 times over software emulation. The MicroBlaze processor is also scalable, so designers can tune performance to match the requirements of target applications and choose greater mathematical accuracy when needed. In addition, the processor offers ready-to-use, prebuilt configuration options such as pattern-compare instructions for faster location of string, byte, or word matches. The MicroBlaze soft processor core is available as part of the $495 Xilinx EDK (embedded development kit). In addition to the MicroBlaze core, the EDK includes a set of system tools to design embedded-system applications for Xilinx FPGAs.

Although platform-FPGA capabilities are skyrocketing, designers should continue to evaluate general-purpose or custom alternatives. One of the often-cited drawbacks of FPGA technology is the additional power it requires compared with a general-purpose processor or custom ASIC. Most of the traditional SRAM-based FPGAs have standby currents in excess of 100 mA, which rules out most battery-operated-system applications. Likewise, because of the resistance of multiple-pass transistors and longer connection paths, FPGA-based products are also somewhat slower than conventional designs. Without taking the development time of other approaches into account, the cost of FPGA technology is substantially higher. For example, devices in Altera's latest FPGA family cost $190 to $9350, depending on the number of gates and I/O pins.

Design security is another concern for FPGA developers. In some cases, especially for SRAM designs that store configuration information and transfer it to the FPGA on power-up, IP information is vulnerable. Designers may spend months developing proprietary algorithms and configurations only to reveal the design to competitors or copycats with the first production unit. To combat IP loss, FPGA vendors use nonvolatile programming techniques along with embedded serial numbers to trace counterfeit products. Actel's Mason boasts, "We have a sophisticated security mechanism to protect internal IP. We have many customers that come to Actel for custom-marked devices, load their custom IP, and sell them as their own parts. We have no problem with that business model."

One of the most formidable obstacles to adopting FPGA technology is the steep learning curve associated with development tools. Mentor Graphics tackles this problem by offering the vendor-neutral FPGA Advantage integrated HDL-design environment. The tool enables design creation, simulation with debugging and analysis, synthesis, management, and documentation as a smooth-flowing operation from one step to the next. Interchangeable textual, tabular, and graphics editors allow designers to select their most comfortable environment (Figure 1). Prices for FPGA Advantage start at $12,000. Mentor also offers I/O Designer, a development tool that integrates the FPGA- and pc-board-design processes to minimize the number of signal layers and maximize signal data rates.

Altium is another tool vendor combining FPGA- and pc-board design. Nick Martin, founder and chief executive officer of Altium, explains: "The history of electronics charts a continuous movement toward designing at higher levels of abstraction to efficiently contend with increasing levels of complexity. Microprocessors and digital-design paradigms allowed portions of the design problem to move into a highly fluid and easily updatable realm: software. Today, the availability at relatively low cost of high-capacity, high-performance programmable devices, such as FPGAs, is again shifting the balance and allowing previously fixed design elements, such as the processor and its peripheral components and logic blocks, to move into a 'soft' domain." Altium Designer provides a single unified application that claims to have all the technologies and capabilities necessary for complete electronic-product development. Altium Designer integrates board- and FPGA-level system design; embedded-software development for FPGA-based processors; and pc-board layout, editing, and manufacturing within a single design environment (Figure 2). Unlike with HDL-design tools, electronics engineers and board-level designers can use Altium Designer without the help of dedicated HDL experts or specialized FPGA designers. The full-licensing option, which gives access to all Altium Designer capabilities, costs $11,995.

Embedded-board vendors have also adopted FPGA technology to offer customers off-the-shelf, reconfigurable designs. Pentek Vice President Roger Hosking comments, for example, "We have designed FPGAs into our boards for years but only recently have we offered customers the option of reconfiguring those circuits. We use only 5 to 10% of an FPGA for standard board operations, such as signal routing, and the remaining resources are available. Now, customers can incorporate sophisticated algorithms, such as fast Fourier transforms, filters, demodulators, and digital receivers. We also offer IP-core libraries primarily for software radios. We are working on a high-density channelizer, which provides 256 narrowband digital receivers in a single FPGA. An equivalent circuit using today's four-channel ASIC downconverter would require 64 discrete packages—a huge difference in cost, space, and power. An FPGA delivers high density, but if you don't need it, use an ASIC or a general-purpose DSP."

Pentek recently introduced an FPGA-based software-radio transceiver module suitable for connection to the IF or RF ports of a communication system. The Model 7140 PMC module combines both transmitting and receiving capabilities with a high-performance Virtex II-Pro FPGA and supports the emerging VITA (VMEbus International Trade Association) 42 XMC standard with optional switched-fabric interfaces for high-speed I/O (Figure 3). In addition to acting as a simple transceiver, the module can perform user-defined DSP functions on the baseband signals. Such functions include demodulation/modulation, decoding/encoding, decryption/encryption, digital delay, and channelization of the signals between reception and transmission. Pentek's GateFlow FPGA Design kit provides designers with all VHDL source code and device configuration for the basic factory-installed functions to facilitate the addition of custom algorithms. Prices for the Model 7140 PMC module start at $6995.

Aimed at leveraging FPGA processing into small embedded systems, the Tsunami PC104 platform from SBS Technologies is suitable for mobile cart-based systems, machine-sensor applications, and control-I/O applications (Figure 4). The PC/104 Plus processor includes an Altera Stratix FPGA on a 32-bit, 33-MHz PCI interface, with enough memory and high-bandwidth datapaths to make full use of the processing power of the Stratix chip. "FPGA-based processing power comes from ASIC-like efficiency of software re-programmable logic and the ability to parallel-process multiple streams of data," says Ron Strauss, vice president of SBS Canada. "If your embedded application requires the resources of multiple CPUs or DSPs to process the required data rate and algorithm complexity, you should instead be considering an FPGA-computing approach." The Tsunami PC104 Plus costs $4500 as a stand-alone board or $6000 with the Wave FPGA software-development-tool kit.

With today's short product life cycles, embedded-system designers need ways to create multiple system configurations with minimum custom hardware. FPGA-based products offer designers that flexibility. The reduced risk, shorter design cycles, and minimized nonrecurring-engineering charges of FPGA projects offer many advantages over ASIC-based designs. However, the added recurring cost and power required for FPGA designs limit their application to high-performance, multichannel projects.