Designers frequently use linear regulators to postregulate switching-regulator outputs. The benefits of this approach include improved stability, accuracy, and transient response, along with lower output impedance. Ideally, markedly reduced switching-regulator-generated ripple and spikes would accompany these performance gains. In practice, all linear regulators encounter some difficulty with ripple and spikes, particularly as frequency rises. The regulator's small input to output differential voltages magnify these effects; this situation is unfortunate, because such small differentials are desirable for maintaining efficiency.

Input-filter capacitors smooth the ripple and spikes before they reach the regulator (Figure 1). The output capacitor maintains low output impedance at higher frequencies, improves load transient response, and supplies frequency compensation for some regulators. Ancillary purposes include minimizing both noise and the appearance of residual-input-derived artifacts at the regulator's output. These artifacts are of concern because these high-frequency components, even though of small amplitude, can cause problems in noise-sensitive video, communication, and other types of circuitry. Designers expend large numbers of capacitors and aspirin in attempts to eliminate these undesired signals and their resultant effects. Although these signals are stubborn and sometimes seemingly immune to any treatment, understanding their origin and nature is the key to containing them.

Figure 2 details a switching regulator's dynamic ac-output content. It comprises relatively low-frequency ripple at the switching regulator's clock frequency—typically, 100 kHz to 3 MHz—and high-frequency content "spikes" associated with power-switch transition times. The switching regulator's pulsed energy delivery creates the ripple. Filter capacitors smooth—but do not eliminate—the ac content. The spikes, which often have harmonic content approaching 100 MHz, result from high-energy, rapidly switching power elements within the switching regulator. Slowing the regulator's repetition rate and transition times can greatly reduce ripple and spike amplitude, but the size of the magnetic elements increases, and their efficiency falls. Circuitry employing this approach has significantly reduced harmonic content but sacrificed the magnetics' size and efficiency (Reference 1). The same rapid clocking and switching that allows the use of small, highly efficient passives results in the presentation of high-frequency ripple and spikes to the linear regulator.

The regulator is better at rejecting the ripple than the wideband spikes. In a typical example, the rejection performance for an LT1763 low-dropout linear regulator, 40 dB of attenuation at 100 kHz rolls off to about 25 dB at 1 MHz (Figure 3). The more wideband spikes pass directly through the regulator. The output-filter capacitor, which absorbs the spikes, also has high-frequency performance limitations. The imperfect response of the regulator and filter capacitors, due to high-frequency parasitics, reveals Figure 1 to be too simplistic. Including parasitic terms and some new components shows the regulation path with emphasis on high-frequency parasitic terms (Figure 4). It is important to identify these terms because they allow ripple and spikes to propagate into the nominally regulated output.

Additionally, understanding the parasitic elements permits a measurement strategy, facilitating reduction of high-frequency output content. The regulator includes high-frequency parasitic paths, primarily capacitive, across its pass transistor and into its reference and regulation amplifier. These terms combine with finite regulator gain bandwidth to limit high-frequency rejection. The input- and output-filter capacitors include parasitic inductance and resistance, degrading their effectiveness as frequency rises. Stray layout capacitance provides additional unwanted feedthrough paths. Ground-path resistance and inductance promote ground-potential differences, which add error and also complicate measurement.

Some new components, not normally associated with linear regulators, also appear. These additions include ferrite beads or inductors in the regulator input and output lines. These components have their own high-frequency parasitic paths but can considerably improve overall regulator high-frequency rejection (see sidebar "The truth about ferrite beads").

Understanding the problem requires observing regulator response to ripple and spikes under a variety of conditions. You should independently vary ripple and spike parameters, including their frequency, harmonic content, amplitude, duration, and dc level. This capability is versatile, permitting real-time optimization and sensitivity analysis to various circuit variations. Although no substitute exists for observing linear-regulator performance under actual switching-regulator-driven conditions, a hardware simulator reduces the likelihood of surprises (Figure 5). It simulates a switching regulator's output with independently settable dc, ripple, and spike parameters.

The design combines a commercially available function generator with two parallel signal paths to form the circuit. It transmits dc and ripple on a relatively slow path and processes wideband spike information through a fast path. The two paths combine at the linear-regulator input. The function generator's settable ramp output (Figure 6, Trace A) feeds the dc/ripple path, which is made up of power amplifier IC₁ and associated components. IC₁ receives the ramp input and dc-bias information and drives the regulator under test. L₁ and the 1Ω resistor allow IC₁ to drive the regulator at ripple frequencies without instability.

The function generator's pulsed synchronous output (Trace B) sources the wideband spike. Amplifier IC₂ differentiates the output's edges (Trace C) and feeds bipolar comparator IC_3A and IC_3B. The comparator-output spikes (traces D and E) are synchronized to the ramp's inflection points. Complementary dc-threshold potentials applied to IC_3A and IC_3B with the 1-kΩ potentiometer and IC₂ control the spike width. Diode gating and the paralleled logic inverters present Trace F to the spike-amplitude control. Follower Q₁ sums the spikes with IC₁'s dc/ripple path, forming the linear regulator's input (Trace G).

The circuit in Figure 5 facilitates evaluation of linear-regulator high-frequency rejection. The waveform in Figure 7 shows Figure 5's LT1763 3V regulator response to a 3.3V-dc input with Trace A's ripple/spike contents, C_IN=1 µF, and C_OUT=10 µF. Regulator output (Trace B) shows ripple attenuated by a factor of approximately 20. Output spikes see somewhat less reduction, and their harmonic content remains high. The regulator offers no rejection at the spike's rise time. The capacitors must do the job. Unfortunately, inherent high-frequency loss terms prevent the capacitors from filtering the wideband spikes; Trace B's remaining spike shows no rise-time reduction. Increasing the capacitor value has no benefit at these rise times. Figure 8, with the same trace assignments as Figure 7 but with a value of 33 µF for C_OUT, shows a fivefold ripple reduction but little spike-amplitude attenuation.

Figure 9's time and amplitude expansion of Figure 8's Trace B permits high-resolution study of spike characteristics, allowing the following evaluation and optimization. Figure 10 shows dramatic results when a ferrite bead immediately precedes C_IN. Spike amplitude drops about fivefold. The bead presents loss at high frequency, severely limiting spike passage. The dc and low-frequency components pass unattenuated to the regulator. Placing a second ferrite bead at the regulator output before C_OUT produces Figure 11's trace. The bead's high-frequency loss characteristic further reduces spike amplitude below 1 mV without introducing dc resistance into the regulator's output path. You can sometimes use inductors in place of beads, but make sure that you understand inductors' limitations (see sidebar "Using inductors as high-frequency filters").

Figure 12, which shows a higher gain version of Figure 11, measures 900-µV spike amplitude—almost 20 times lower than without the ferrite beads. Complete the measurement by verifying that common-mode components or ground loops do not corrupt the indicated results. You achieve this goal by grounding the oscilloscope input near the measurement point. Ideally, no signal should appear. Figure 13 shows almost no signal, indicating that Figure 12's display is realistic. Faithful wideband measurement at submillivolt levels requires special considerations (see sidebar "Probing technique for submillivolt-wideband-signal integrity"). The articles, application notes, and books in references 2 through 9 are also helpful to serious designers.