Intel Demos 45nm SRAM

By Jessica Davis -- Electronic News, 1/25/2006

With 65 nanometer volume production just recently underway, Intel today has announced that it has achieved a significant milestone in the race to the 45nm process.

The Santa Clara, Calif.-based chip giant said it is the first company that has demonstrated a fully functional 45nm SRAM chip with more than a billion transistors.

The company uses SRAM chips as test vehicles for the development of its logic chips, and says this demonstration means it is on track to release 45nm processors in the second half of 2007 – keeping Intel on schedule to continue to scale down every two years per Moore's Law.

As scaling to smaller and smaller nodes becomes more challenging, “many of our competitors are talking about slowing down the introduction of new process technologies, but we are not doing that,” said Intel Senior Fellow Mark Bohr who briefed reporters on the milestone.

Intel typically does its logic chip a year and a half after the test vehicle SRAM chip, according to Bohr.

The Intel engineer said the 45nm chip required the company to do “innovative things on transistors and interconnects,” but that the company was not yet ready to discuss the details of those publicly. But the fact that the test vehicle SRAM chip has been demonstrated means the process technologies have more or less been locked down, including the layout design rules, interconnect materials and most if not all of the manufacturing tools, according to Bohr. 

The transistors are still planar, and Intel is not using finFETs or trigates in this generation, he added.  The company is continuing the use of strained silicon at 45 nm. The process used 193nm dry lithography to pattern critical layers, Intel said.

The 45nm process transistors offer more than a 20 percent improvement in switching speed or 5 times less power leakage than those on the market today.  Such an improvement will improve battery life for mobile devices and enable developers to build smaller devices. The process also offers a 30 percent reduction in transistor switching power and a 2 times improvement in transistor density.

The 45nm process is under development at Intel’s D1D fab in Oregon. In addition the company has announced that two high-volume fabs are under construction to manufacture chips using the 45nm process – Fab 32 in Arizona and Fab 28 in Israel.

“This was quite a challenging generation,” said Bohr. “Maybe a little more challenging than the 65nm process.  But we have a very talented team of engineers.”