Zibb

Design Idea

Shift registers and resistors deliver multiphase sine waves

This simple method uses only digital logic and fixed-value resistors.

Gary Steinbaugh, 4 E A Transform, Loveland, OH; Edited by Brad Thompson and Fran Granville -- EDN, 4/13/2006

Sine waves with fixed phase relationships find application in communications equipment, instrumentation, and power sources. Although you can use any of several traditional analog techniques to generate basic sine-wave signals, this Design Idea offers a simple method that uses only digital logic and fixed-value resistors (Figure 1a). A common clock pulse drives three of four sections of a pair of CD4015 4-bit shift registers that recirculate a pattern comprising 12 zeros and 12 ones—that is, 000000000000111111111111. Each of the registers' outputs drives a resistor, R1 through R12, that connects to a summing node. If all of the resistors were of equal value, their summed output would comprise a stepped linear triangular waveform at a repetition frequency one-twenty-fourth that of the clock frequency.

To produce a stepped sinusoidal output waveform, you replace the equal-value resistors with the weighted values in Figure 1a. If you use resistors of 1% tolerance, the output's amplitude will approximate that of a true sine wave to better than 1°. To produce a cleaner sine wave, a lowpass filter helps remove clock-pulse feedthrough and stepped-edge transients (Figure 1b). For many applications, a simple one-pole lowpass filter/buffer provides adequate filtering, but a more elaborate multipole filter further increases output purity.

You can add a second set of registers and resistors, R13 through R24, to produce cosine and sine waves offset by a 90° phase shift—that is, two sine waves in quadrature (Figure 2). Register IC2A's inverted and recirculated output from Q4 generates the 000000000000111111111111 bit pattern that the first set of shift registers uses. IC1B's Q2 output produces the D input that you apply to the second set of shift registers—IC2B, IC3A, and IC3B—which in turn generate a 90° phase-shifted version of the bit pattern to form a cosine wave. The cosine bit pattern requires no recirculation and simply propagates through the second set of shift registers and "falls off the end." To adjust the second output's phase shift with respect to the first output from 15 to 180° in 15° increments, you can connect IC2B's D input to any one of IC1's or IC2A's Q outputs.

Figure 3 illustrates a three-phase sine-wave-generator circuit. The Q4 output from IC1B supplies the D input to the second set of shift registers, IC2A and IC2B, to produce the recirculated bit pattern. In similar fashion, the Q4 output from IC3A supplies the D input to the third set of shift registers, IC4A, to transfer a duplicate bit pattern that's phase-shifted by 240° with respect to the output from the first set of shift registers.

Register IC2B's D input connects to IC1B's Q4 output to produce a signal—Phase 2's output—that lags behind the Phase 1 output by 120°. In similar fashion, register IC4A's D input connects to IC3A's Q4 output to produce a signal—Phase 3's output—that lags behind Phase 2's output by 120°, or 240° with respect to Phase 1.

You can expand the basic circuit to accommodate additional signal phases. The weighted resistors' values are adequate for low-frequency sine waves and 4000-series CMOS-logic devices. However, you can scale the resistors' values to accommodate other output frequencies and logic families.



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