Intel’s New Core

By Jessica Davis -- Electronic News, 9/22/2006

Justin Rattner, CTO of Intel, sat down with Electronic News a week ahead of the Intel Developers Forum to talk about the challenges of multicore architecture, a selection of projects at Intel Research and how competition with AMD is affecting research priorities. The following are excerpts of that conversation

Electronic News: What are the top three technology challenges for Intel today?

Rattner: Certainly what is occupying most of our time is energy efficiency. And as I tried to point out in my IDF [Intel Developers Forum] keynote in the spring that’s not just limited to the energy efficiency of the processor but really extends to the whole platform whether that platform is a mobile platform or a server platform or anything in between. Platform energy efficiency is a major issue, so I think that is clearly number one.

There might be some different viewpoints on what number two is, but obviously I have a lot of concern about the ecosystem around multicore, particularly the software ecosystem and the development of a robust software base around multicore architecture. I think really building up the base of know-how is going to be key to harnessing the power of multicore architecture going forward.  Today you’ve got dual cores, Core2 Duo and the like, but we’re going to have quad cores here very shortly and I’m sure people will be talking about six and eight cores over the next couple of years. 

The question is going to be how are we going to get the software done that is going to take advantage of all those cores. That is at least part of what motivated my HotChips keynote – putting the tools in place that would let us do a good job creating the architectures. The other part of that is what needs to be in place in terms of tools to help programmers create those applications in the first place.

Third, over the longer term we’re seeing form factors decrease, and with those decrease in form factors it becomes more and more difficult to affect an elegant user interface. The trend towards more mobile devices and smaller devices with limited screen space is driving the need for innovation around user interfaces. That’s a major one for us on the research side of Intel.

Electronic News: Two of those three seem software-centric. Are they?

Rattner: I wouldn’t say that. I think in fact there’s a very close relationship between hardware and software in terms of creating a programming capability for multicore that is much more productive than the one that we have today. We’ve suggested some directions there in the past. Broadly speaking the architectures today have done very little to address themselves to the unique programming requirements of multicore.

It’s past time for architects to be giving special attention to the programming challenges of multicore and start incorporating features that are conducive to that. It’s no different than the architectural transformation that took place as we moved from primarily assembly language programming to higher level language programming. People used to spend a lot of time worrying about elegance of the instruction coding so assembly language programmers would find it easy to program at the machine language level. As higher level languages became popular that architecture has responded to those needs. I’m just suggesting that once again it’s time to give special attention to the programming needs, in this case for multicore.

Electronic News: Does training at the university level have to change to prepare for these changes in the industry?

Rattner:

Oh, absolutely. Intel has been quite proactive there in working with universities in creating programs and material to be used, particularly in college level courses. Until recently you couldn’t even take a course in writing a parallel program. That’s changing pretty rapidly, but it needs to expand and improve along with the architectures.

Electronic News: Is it hard to find programmers with that training today, and is there a way for existing programmers to get those skills?

Rattner:

The need is growing, and I think a lot of programmers will in fact have to be trained to program for multicore and to learn how to structure their applications in a way to take maximum advantage of multicore.

Electronic News: Switching gears, what do you think are some of the most innovative far off projects currently being looked at by Intel research?

Rattner:

Probably the most far out one is dynamic physical rendering which is this idea of creating these micro-mechanical nano-mechanical entities that can rapidly physically reconfigure themselves to take on different shapes and exhibit dynamic behaviors -- to move and change shape and do things of that sort. We have some macro-scale models of this notion of dynamic physical rendering but ultimately you’d like to see essentially very tiny but intelligent particles being able to organize themselves in the same way but do it at a much higher degree of resolution.

Electronic News: What is the end application for something like that?

Rattner:

It’s like 3D printing. Any three dimensional design could be physically expressed in this way. There’s a science fiction book by Michael Crichton called Prey. It’s these nanobots that are capable of dynamic physical rendering and they are so good at it that they can actually come together and look like a person. We are at the very beginning of that. But the science fiction writers are looking at the long term consequences.

Electronic News: Which project in Intel Research has the most potential to become the next big thing?

Rattner:

There are probably three things that we are doing that fall into that category. The one that is in the news today is the silicon photonics. That has the potential to have a huge impact on the way systems are designed. Optical interconnect has really only been highly successful in fairly long-haul applications – telecommunications, undersea cables, metro area networks. One of the reasons for that is it’s very expensive. So the things you are connecting better be even more expensive and be far enough apart to justify an optical connection. What we are trying to do is radically change the economics of an optical connection, so you can think of it in a way that becomes interchangeable with electric interconnects at the chip level.  So that’s going to require several orders of magnitude improvements in cost to achieve that, and we’ve been working steadily towards that over last four or five years. The laser we announced today is a very key step towards a complete silicon photonic interconnect. We hope to demonstrate that over the next few years. We have all the building blocks now. We have all the pieces. Now it’s time to integrate them and demonstrate a solution. That could be big.

The next one, which was certainly to be a key consumer of silicon photonics, assuming we are successful there, is our terascale research. This idea uses multicore technology aggressively to scale performance up by a factor of 10 to 100 over the next five years or so and sort of change our notion of applications. We are enabling entirely new classes of applications based on this dramatic improvement on systems performance. That has the potential to completely transform our product line.

For the third one, I would pick the idea of a digital or digitally enhanced radio that is highly adaptive and capable of acting as many radios at the same time. Instead of filling platforms up with radios as we have been doing more and more today – I mean you have Wi-Fi and you have Bluetooth and wireless USB and you might have GPS and you might have broadband cellular communication or WiMax. Instead of having a platform that is full of radios, there is just one radio but it’s capable of doing all the radios I’ve mentioned, plus a few more.

Electronic News: How far off is that?

Rattner: That’s probably in the five year time frame. And much the way we’ve approached the silicon photonics problem we continue to demonstrate key building blocks for the digitally enhanced radio. Sometime over the next several years we will demonstrate a complete solution. One radio that can operate over very wide – multi gigahertz – frequency range and can be a cellular radio, Wi-Fi radio, WiMax radio and GPS receiver, etc.

Electronic News: At Intel’s Research Day this spring you said that Intel was following the approach of putting multiple identical cores on a chip, back when AMD was talking about asynchronous approach. Is there any research at Intel looking at that alternate approach?

Rattner: Not in a strict sense. I think we’re certainly looking at opportunities to allow that experimentation to take place. I think there are going to be some announcements at IDF along that line. But we’ve been focused more at augmenting Intel Architecture than mingling different architectures and different instruction sets.  So, if there’s a well understood function that can be implemented extremely efficiency in hardware and isn’t likely to change overtime, like a codec or something, we think it’s quite reasonable to incorporate those and integrate those into the Intel architecture and make them part of the overall framework.Where we find it difficult is to actually introduce a new instruction set, and to go do something of a specialized nature. That’s why we are a little more focused on augmenting the existing architecture and leveraging all of those tools. At least from our customer contacts and feedback from key users, the advantages of doing that far outweigh the opportunity to do something completely different.

Electronic News: How does the more competitive market for processors influence Intel Research in terms of priorities and looking at what projects should get most of the focus?

Rattner: Sure, but I don’t know if there has been any dramatic shift. The areas we have been focusing on have been stable now for the last several years. If you go back in time we were highly influential in bringing out what started with Banias and Pentium M and reached its current expression in Core2 -- really finding much more power efficient ways to realize the architecture. That continues to be a big theme for us.

I think the topic of platform level energy efficiency was something we were driving even before it became a major competitive issue. We were well along in areas such as this before they became hot topics, or major issues in the industry. So we haven’t seen a dramatic shift. The issues that are front and center at the moment are ones that we’ve been working on for some time.

Electronic News: A lot of the great well-funded research organizations have seen their research dollars shrivel away. How has that shift affected the industry? Is it good that companies are oriented on totally profit-oriented projects, or does that limit some of the research that may seem out-there today but eventually could be significant?

Rattner: Actually, I may take issue with that. We’ve been doing benchmarks of late and we notice, for example, that GE Research, a very old company in a calendar sense, is actually growing the size of their research organization. Some of the new companies, Google may be the best known example, have been growing their research organizations as well as encouraging the broader organizations to spend some fraction of their time thinking out of the box. There are some new research labs starting to open up. I think it’s changed. I think the industrial research lab as a peer of an academic research organization -- that’s shrunk dramatically.

But industrial research, and this is certainly true for research at Intel, has shifted gears. IBM is also sort of in this trajectory where the research agendas are driven to a much less extent by what are the popular academic research topics and more by what are the problems that our products and our product designers are facing, and how can we create solutions for them that will be at the core and foundation of our future products. It’s possible to do challenging leading edge research, and silicon photonics is a good example of that, almost Nobel-class research, do it and do it in a way that is highly relevant to the commercial interests of the company.