Si2 Forms Low-Power Coalition
By Ann Steffora Mutschler -- Electronic News, 10/4/2006
Austin, Texas-based EDA standards body Silicon Integration Initiative (Si2) said today it has formed a Low-Power Coalition (LPC) that will work to create enhanced capabilities in low-power integrated circuit (IC) design flows.
Synopsys and Magma Design Automation independently have donated low-power technology to the Accellera standards body, while Cadence Design Systems launched its Power Forward initiative earlier this year.
Work in the LPC will be centered on low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability, with the intent of developing a unified system approach to low power chip design covering the entire design flow, incorporating all applicable standards as necessary, Si2 noted.
Founding members of the LPC are being finalized and will be announced at a later date. All interested parties are invited to join this effort.
Si2 explained further that The LPC will work to integrate existing open formats and new contributions into complete adoptable flows, and provide critical solutions support including market education and outreach, enabling software, and technical support.
Dedicated technical staff resources will also be dedicated at Si2 to the LPC, and the consortium aims to collaborate with other relevant groups, including Accellera, the SPIRIT Consortium and other industry organizations.
“Si2 members have underscored the criticality of integrating enhanced low-power capabilities into multi-vendor design flows,” noted Steve Schulz, president and CEO of Si2 in a statement.
“The LPC not only addresses immediate low-power flow concerns, but also targets further optimizations and enhancements for reusable IP blocks and upstream migration of low-power intent,” he added.
In anticipation of future collaboration, Si2 and Accellera are holding a Low Power Workshop tomorrow in San Jose -- intended to serve as an open forum for key contributors from end-user companies to identify the critical needs in the area of low power design, verification, and analysis of integrated circuit chips.













