Using rms to measure waveforms furnishes the most accurate amplitude information (Reference 1). Rectify-and-average schemes, which you usually calibrate to a sine wave, are accurate for only one waveshape, however. Departures from this waveshape result in pronounced errors. Although accurate, rms conversion often entails limited bandwidth, restricted range, complexity, and difficult-to-characterize dynamic and static errors. Recent developments address these issues and also improve accuracy. Table 1 shows Linear Technology's LTC1966/LTC1967/LTC 1968 device family. The devices feature low-frequency accuracy, including linearity and gain error, of 0.5% and 1% error at bandwidths extending to 500 kHz. These converters employ a sigma-delta-based computational scheme to achieve their performance.

Figure 1's pinout descriptions and basic circuits reveal an easily applied device. An output filter capacitor is all that is necessary to form a functional rms/dc converter. The figure shows split- and single-supply-powered variants. Such ease of implementation invites a broad range of application; examples begin with Figure 2.

Figure 2's ac-power-line monitor has 0.5% accuracy over a sensed 90 to 130V-ac input and provides a safe, fully isolated output. Conversion of rms provides accurate reporting of ac-line voltage, regardless of waveform distortion, which is common. T₁'s ratio divides down the ac-line voltage. An isolated and reduced potential appears across T₁'s secondary, B, at which it resistively scales and presents itself to IC₁'s input. Power for IC₁ comes from T₁'s secondary, A, which you rectify, filter, and zener-regulate to dc. IC₂ provides a numerically convenient output from gain. You can increase accuracy by biasing T₁ to an optimal loading point, which the relatively low-resistance-divider values facilitate. Similarly, although IC₁ and IC₂ can operate from one supply, split supplies maintain symmetrical T₁ loading. You calibrate the circuit by adjusting the 1-kΩ trim for 1.20V output with the ac line at 120V ac. You make this adjustment using a variable-ac-line transformer and a floating rms voltmeter (see sidebar "AC-measurement and signal-handling practice" for recommendations on rms voltmeters and other ac-measurement-related gossip).

Figure 3's error plot shows 0.5% accuracy from 90 to 130V ac, degrading to 1.4% at 140V ac. The beneficial effect of trimming at 120V ac is evident; trimming at full-scale would result in larger overall error, primarily due to nonideal-transformer behavior. Note that the data is specific to the transformer. Substitution for T₁ necessitates circuit-value changes and recharacterization.

RMS/dc converters commonly require accurate rms-amplitude measurement of an SCR's (silicon-controlled rectifier's) chopped ac-line waveforms. The SCR's fast sine-wave switching complicates this measurement because this speed introduces odd waveshapes with high-frequency harmonic content. Figure 4's conceptual SCR-based ac/dc converter is typical. The SCRs alternatively chop the 220V-ac line, responding to a loop-enforced, phase-modulated trigger to maintain a dc output. Figure 5's waveforms show typical operation. Trace A represents one ac-line phase, and Trace B represents the SCR cathodes. The SCR's irregularly shaped waveform contains dc and high-frequency harmonics, requiring wideband rms conversion for measurement. Additionally, for safety and system-interface considerations, you must fully isolate the measurement.

Figure 6 provides isolated power and data-output paths to an rms/dc converter, permitting safe, wideband, digital output-rms measurement. A pulse-generator-configured comparator combines with Q₁ and Q₂ to drive T₁, resulting in isolated 5V power at T₁'s rectified, filtered, and zener-regulated output. The rms/dc converter senses either 135 or 270V-ac full-scale inputs through a resistive divider. The converter's dc output feeds a self-clocked, serially interfaced ADC; optocouplers convey output data across the isolation barrier. The LTC6650 provides a 1V reference to the ADC and biases the rms/dc converter's inputs to accommodate the voltage divider's ac swing. You accomplish calibration by adjusting the 20-kΩ trim and noting that output data agrees with the input ac voltage. Circuit accuracy is within 1% in a 200-kHz bandwidth.

Almost all functioning ac-line-voltage regulators rely on some form of waveform chopping, clipping, or interruption. This requirement promotes efficiency but introduces waveform distortion, which is unacceptable in some applications. Figure 7 regulates the ac line's rms value within 0.25% over wide input swings and introduces no distortion. It accomplishes this task by continuously controlling the conductivity of a series-pass MOSFET in the ac line's path. Enclosing the MOSFET in a diode bridge permits it to operate during both ac-line polarities.

You apply the ac-line voltage to the Q₂-diode bridge. A calibrated variable-voltage divider senses this bridge and feeds IC₁. You route IC₁'s output, representing the regulated line's rms value, to control amplifier IC₂ and compare it with a reference. IC₂'s output biases Q₁, controlling drive to a photovoltaic optoisolator. The optoisolator's output voltage provides level-shifted bias to diode-bridge-enclosed Q₂, closing a control loop, which regulates the output's rms voltage against ac-line and -load shifts. RC components in IC₂'s local feedback path stabilize the control loop. The loop operates Q₂ in its linear region, much like a common low-voltage dc linear regulator. The result is the absence of introduced distortion at the expense of lost power. Heat dissipation constrains the available output power. For example, when you set the output adjustment to regulate 10V below the normal input, Q₂ dissipates about 10W at 100W output. You can improve this figure, however. The circuit regulates for V_IN≥2V above V_OUT, but operation in this region risks regulation dropout as V_IN varies.

Circuit details include JFET Q₅ and associated components. The passive components associated with Q₅'s gate form a slow turn-on negative supply for IC₁. They also provide gate bias for Q₅, a soft-start transistor that prevents abrupt ac power application to the output at start-up. When power is off, Q₅ conducts, holding IC₂'s positive input low. When you apply power, IC₁ initially has a 0V reference, causing the control loop to set the output at zero. As the 1 MΩ, 0.22-µF combination charges, Q₅'s gate moves negative, causing its channel conductivity to gradually decay. Q₅ ramps off, IC₂'s positive input moves smoothly toward the LT6650's 400-mV reference, and the ac output similarly ascends toward its regulation point. Current sensor Q₆, measuring across the 0.7Ω shunt, limits output current to approximately 1A. At normal line inputs of 90 to 135V ac, Q₄ supplies 5V operating bias to the circuit. If line voltage rises beyond this point, Q₃ comes on, turning off Q₄ and shutting down the circuit.

The preceding circuits furnish high-level inputs to the rms converter. Many applications lack this advantage and require some form of preamplifier. High gain preamplification for the rms converter requires more attention than you might suppose. The preamplifier must have low offset error because the rms converter (desirably) processes dc as legitimate input. More subtly, the preamplifier must have far more bandwidth than is immediately apparent. The amplifier's –3-dB bandwidth is of interest, but its closed-loop 1%-amplitude-error bandwidth must be high enough to maintain accuracy over the rms converter's 1%-error passband. This requirement is not trivial, because very high open-loop gain at the maximum frequency of interest is necessary to avoid inaccurate closed-loop gain.

Figure 8 shows a gain-of-1000 preamplifier that preserves the LTC1966's dc to 6-kHz, 1% accuracy. The amplifier may be either ac- or dc-coupled to the rms converter. The 1-mV full-scale input splits into high- and low-frequency paths. IC₁ and IC₂, which are both ac-coupled, take a cascaded, high-frequency gain of 1000. Chopper-stabilized IC₃ which is dc-coupled, also has a gain of 1000, but its RC-input filter restricts it to operate only at dc and low frequency. Assuming the switch is set to dc+ac, high- and low-frequency-path information recombine at the rms converter. The high-frequency path's 650-kHz, –3-dB response combines with the low-frequency section's microvolt-level offset to preserve the rms converter's dc to 6-kHz 1% error. If you require only ac response, set the switch to the appropriate position. The minimum processable input, which the circuit's noise floor sets, is 15 µV.

The LTC1968, with a 500-kHz, 1%-error bandwidth, poses a significant challenge for an accurate preamplifier, but the circuit in Figure 9 meets the requirement. This design features decade-ranged gain to 1000 with a 1%-error bandwidth beyond 500 kHz, preserving the rms converter's 1%-error bandwidth. Its 20-µV noise floor maintains wideband performance at microvolt-level inputs. Q_1A and Q_1B form a low-noise buffer, permitting high-impedance inputs. IC₁ and IC₂, which are both gain-switchable, take cascaded gain in accordance with the figure's table. You set the gains using reed relays, which a 2-bit code controls. IC₂'s output feeds the rms converter, and a Sallen-Key active filter smoothes the converter's output. The circuit maintains 1% error over a 10-Hz to 500-kHz bandwidth at all gains due to the preamplifier's –3-dB, 10-MHz bandwidth. You can eliminate the 10-Hz, low-frequency restriction with a dc-stabilization path similar to the one in Figure 8, but you would have to switch its gain in concert with the IC₁-IC₂ path.

Figure 10 shows preamplifier response to a 1-mV input step at a gain of 1000. IC₂'s output is singularly clean, with trace thickening in the pulse's flat portions due to the 20-µV noise floor. The 35-nsec rise time indicates a 10-MHz bandwidth. To calibrate this circuit, first set S₁ and S₂ high, ground the input, and trim the zero adjustment for 0V dc at IC₂'s output. Next, set S₁ and S₂ low, apply a 1V, 100-kHz input, and trim A=1 for unity gain, which you measure at the circuit output, in accordance with the table in Figure 9. Continue this procedure for the remaining three gains in the table. A good way of generating the required accurate low-level inputs is to set a 1V-ac level and divide it down with a high-grade 50Ω attenuator, such as the Hewlett-Packard 350D or the Tektronix 2701. It is prudent to verify the attenuator's output with a precision rms voltmeter (see sidebar "AC-measurement and signal-handling practice").

Quartz-crystal rms operating current is critical to long-term stability, temperature coefficient, and reliability. You must minimize introduced parasitics, particularly capacitance, which corrupt crystal operation. This requirement complicates accurate determination of rms-crystal current. Figure 11, a form of Figure 9's wideband amplifier, combines with a commercially available closed-core current probe to permit the measurement. An rms/dc converter supplies the rms value. The quartz-crystal test circuit in dashed lines exemplifies a typical measurement situation. The Tektronix CT-2 current probe monitors crystal current and introduces minimal parasitic loading. The probe's 50Ω termination allows direct connection to IC₁ without the FET buffer in Figure 9. Additionally, because quartz crystals are uncommon at frequencies lower than 4 kHz, IC₁'s gain does not extend to low frequency.

Figure 12 shows the results. A crystal drive, which you take at Q₁'s collector (Trace A), causes a 25-µA-rms crystal current, which appears at the rms/dc-converter input (Trace B). The trace enlargement is due to the preamplifier's 5-µA-rms equivalent-noise contribution. Table 2 details characteristics of two Tektronix closed-core current probes. The primary trade-off is low-frequency error versus sensitivity. The current probes contribute essentially no probe noise, and capacitive loading is notably low. You calibrate the circuit by putting 1-mA rms current through the probe and adjusting the indicated trim for a 1V circuit output. To generate the 1 mA, drive a 1-kΩ, 0.1% resistor with 1V rms.

Figure 13 uses the rms/dc converter's stability in an ac-voltage standard. Initial circuit accuracy is 0.1%, and six months of drift at 20 to 30°C remains within that figure. Additionally, the 4-kHz operating frequency is within 0.01%, and distortion is less than 30 ppm. IC₁ and its power buffer, IC₃, sense across a bridge comprising a 4-kHz quartz crystal and an RC impedance in one arm; resistors and an LED-driven photocell comprise the other arm. IC₁ sees positive feedback at the crystal's 4-kHz resonance, promoting oscillation. Negative feedback, stabilizing oscillation amplitude, occurs through a control path, which includes an rms/dc converter and an amplitude-control amplifier, IC₅. IC₅ acts on the difference between IC₃'s rms-converted output and the LT1009 voltage reference. Its output controls the LED-driven photocell to set IC₁'s negative feedback. RC components in IC₅'s feedback path stabilize the control loop. The 50-kΩ trim sets the optically driven resistor's value to the point at which IC₃'s lowest output distortion occurs and maintains adequate loop stability.

Normally, you would ground the bridge's "bottom." Although this connection works, it subjects IC₁ to common-mode swings, increasing distortion due to IC₁'s finite common-mode rejection versus frequency. IC₂ eliminates this concern by forcing the bridge's midpoints and, hence, common-mode voltage to 0V but not influencing desired circuit operation. It accomplishes this task by driving the bridge bottom to force its input differential to zero. IC₂'s output swing is 180° out of phase with IC₃'s circuit output. This action eliminates common-mode swing at IC₁, reducing circuit output distortion by more than an order of magnitude. Figure 14 shows the circuit's 1.414V-rms (2V peak) output in Trace A, and Trace B's distortion constituents include noise, fundamental-related residue, and second-harmonic components.

The 4-kHz crystal is a relatively large structure with a high Q factor. Normally, it would require more than 30 sec to start and arrive at full, regulated amplitude. You avoid this drawback by including the Q1-LTC201-switch circuitry. At start-up, IC₅'s output goes high, biasing Q₁. Q₁'s collector goes low, turning on the LTC201. This action sets IC₁'s gain abnormally high, increasing bridge drive and accelerating crystal start-up. When the bridge arrives at its operating point, IC₅'s output drops to a lower value, Q₁ and the LTC201 switch off, and the circuit moves into normal operation. Start-up time is several seconds.

The circuit requires trimming for amplitude accuracy and lowest distortion. You perform the distortion trim first. Adjust the trim for minimal output distortion, which you measure on a distortion analyzer. Note that the absolute lowest level of distortion coincides with the point at which control-loop gain is just adequate to maintain oscillation. As such, find this point and retreat from it into the control loop's active region. This retreat necessitates giving up about 5-ppm distortion, but you can achieve 30 ppm with good control-loop stability. You trim output amplitude with the indicated adjustment for exactly 1.414V rms (2V peak) at the circuit output.

Figure 15 uses the rms/dc converter in a leveled-output-random-noise generator. Noise diode D₁ ac-biases IC₁, operating at a gain of two. IC₁'s output feeds a 1- to 500-kHz, switch-selectable lowpass filter. The filter output-biases the variable-gain amplifier, IC₂-IC₃. IC₂, a current-controlled transconductance amplifier, and IC₃, an output amplifier, reside on one chip. This stage takes ac gain, biases the LTC1968 rms/dc converter, and acts as the circuit's output. The rms-converter output at IC₄ feeds back to gain-control amplifier IC₅, which compares the rms value with a variable portion of the 5.1V zener potential. IC₅'s output sets IC₂'s gain through the 3-kΩ resistor, completing a control loop to stabilize noise-rms-output amplitude. The RC components in IC₅'s local feedback path stabilize this loop. You can vary the output amplitude using the 10-kΩ potentiometer; a switch permits external voltage control. Q₁ and associated components, a soft-start circuit, prevent output overshoot at power turn-on. Figure 16 shows circuit-output noise in the 10-kHz filter position; Figure 17's spectral plot reveals essentially flat rms-noise amplitude over a 500-kHz bandwidth.

Figure 18 borrows the previous circuit's gain-control loop to stabilize the rms amplitude of an arbitrary input waveform. You apply the unregulated input to variable-gain amplifier IC₁-IC₂ which feeds IC₃. DC coupling at IC₁-IC₂ permits passage of low-frequency inputs. An rms/dc converter, comprising IC₄ and IC₆, takes IC₃'s output, which feeds IC₅'s gain-control amplifier. IC₅ compares the rms value with a variable reference and biases IC₁, closing a gain-control loop. The 0.15-µF feedback capacitor stabilizes this loop, even for waveforms lower than 100 Hz. This feedback action maintains waveshape and stabilizes output-rms amplitude despite large variations in input amplitude. You can set the desired output level with the indicated potentiometer, or you can switch in an external control voltage.

Figure 19 shows output response (Trace B) to abrupt reference-level-setpoint changes (Trace A). The output settles within 60 msec for ascending and descending transitions. You can achieve faster response by decreasing IC₅'s compensation capacitor, but the circuit would then be unable to process low-frequency waveforms. Similar considerations apply to Figure 20's response to an input-waveform step change. Trace A is the circuit's input, and Trace B is its output. The output settles in 60 msec due to IC₅'s compensation. Reducing compensation value speeds response at the expense of low-frequency-waveform processing capability. Specifications include 0.1% output-amplitude stability for inputs of 0.4 to 5V rms, 1% setpoint accuracy, 0.1- to 500-kHz passband, and 0.1% stability for 20% power-supply deviation.