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Intel, IBM embrace high-k metal gates for 45nm

By Ann Steffora Mutschler -- Electronic News, 1/29/2007

Both calling the technology some of the biggest advancements in fundamental transistor design, Intel and IBM separately reported over the weekend that they are both leveraging new materials to build the insulating walls and switching gates of 45nm transistors.

From the Intel camp, the company noted that hundreds of millions of these microscopic transistors will be inside the next-generation Intel Core 2 Duo, Intel Core 2 Quad and Xeon families of multi-core processors with five early-version products up and running -- the first of 15 45nm processor products planned from the company.

Intel said this transistor feat allows the company to continue delivering fast processor speeds, while reducing the amount of electrical leakage from transistors that can hamper chip and PC design, size, power consumption, noise and costs, as well as ensuring that Moore’s Law thrives well into the next decade.

Intel believes it has extended its lead of more than a year over the rest of the semiconductor industry with the first working 45nm processors of its next-generation 45nm family of products --  codenamed “Penryn.” The early versions are to be targeted at five different computer market segments, will run Windows Vista, Mac OS X, Windows XP and Linux operating systems, as well as various applications. Intel reminded that it is still on track for 45nm production in the second half of this year.

Specifically, the technology is a combination of new materials that is meant to reduce transistor leakage and increase performance in 45nm process technology with a property called high-k, for the transistor gate dielectric, and a new combination of metal materials for the transistor gate electrode.

“The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s,” said Intel co-Founder Gordon Moore, in a statement.

Transistors are tiny switches, while the gate turns the transistor on and off and the gate dielectric is an insulator underneath it that separates it from the channel where current flows.

The combination of the metal gates and the high-k gate dielectric leads to transistors with very low current leakage and record high performance.

Intel reminded that silicon dioxide has been used to make the transistor gate dielectric for more than 40 years because of its manufacturability and ability to deliver continued transistor performance improvements as it has been made ever thinner.

The company said it has successfully shrunk the silicon dioxide gate dielectric to as little as 1.2nm thick -- equal to five atomic layers -- on its previous 65nm process technology, but the continued shrinking has led to increased current leakage through the gate dielectric, resulting in wasted electric current and unnecessary heat.

Transistor-gate-leakage associated with the thinning silicon dioxide gate dielectric is recognized by the industry as one of the most formidable technical challenges facing Moore’s Law.

To solve this critical issue, Intel noted that it has replaced the silicon dioxide with a thicker hafnium-based high-k material in the gate dielectric, claming a reduction in leakage by more than 10 times compared to silicon dioxide.

Because the high-k gate dielectric is not compatible with today’s silicon gate electrode, the second part of Intel’s 45nm transistor material recipe is the development of new metal gate materials. While the specific metals that Intel uses will remain guarded, the company said it will use a combination of different metal materials for the transistor gate electrodes.

Intel expects that the combination of the high-k gate dielectric with the metal gate for its 45nm process technology provides more than a 20 percent increase in drive current, or higher transistor performance, while reducing source-drain leakage by more than five times, to improve the energy efficiency of the transistor.

The chip giant said its 45nm process technology also improves transistor density by approximately two times that of the previous generation, allowing it to either increase the overall transistor count or to make processors smaller.

Intel’s 45nm transistors are smaller than the previous generation, requiring less energy to switch on and off, reducing active switching power by approximately 30 percent. Intel said it will use copper wires with a low-k dielectric for its 45nm interconnects for increased performance and lower power consumption, as well as employing new design rules and advanced mask techniques to extend the use of 193nm dry lithography to manufacture its 45nm processors because of the cost advantages and high manufacturability it affords.

From Big Blue’s perspective, the company said it worked with Advanced Micro Devices (AMD) and its other development partners Sony and Toshiba, to construct a critical part of the transistor with a new material, clearing a path toward chip circuitry that is smaller, faster and more power-efficient than previously thought possible.

While Intel’s process is not compatible with current technology, IBM said its technology can be incorporated into existing chip manufacturing lines with minimal changes to tooling and processes, making it economically viable.

IBM expects this to have widespread impact, and has inserted the technology into its semiconductor manufacturing line in East Fishkill, N.Y., and will apply it to products with chip circuits as small as 45nm starting in 2008.

The company noted that as important as the new material itself is, the method for introducing it into current manufacturing techniques and said the creation of this transistor component with the new material was accomplished by the IBM team without requiring major tooling or process changes in manufacturing -- an essential element if the technology is to be economically viable.

AMD also said it is still on schedule to introduce 45nm products in mid-2008, as previously announced, which is approximately 18 months after the company rolled out its 65nm process technology.

At the IEDM 2006 conference in December, AMD and IBM announced they would introduce immersion lithography and ultra low-k dielectrics at 45nm, while Intel is still using a dry lithography technique.

Financial analyst Tim Luke with Lehman Brothers said in a research note this morning that based on the announcements from the company, he is “encouraged by Intel’s server resurgence with the ramp of quad cores and progression 45nm process node technology and by cost cutting potentially lifting operating margins.”


For a technological analysis of this story, check out the "Practical Chip Design" blog by EDN Magazine's Executive Editor Ron Wilson.



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