To be of any use to designers, carbon nanotubes must align with circuit patterns, and an elegant approach to that necessity may now have emerged. Subhasish Mitra, a Stanford University (Palo Alto, CA) assistant professor of electrical engineering and computer science, presented a paper at the Design Automation Conference in San Diego last month that suggests a solution to the problem. Mitra and his team devised a way to form functioning logic circuits from a random tangle of nanotubes on the surface of a die—not by sorting and reconnecting them but by simply trimming away undesirable ones. Mitra's work assumes that the tubes form as semiconductors with transistor functions, not as conductors. If you have a random tangle of transistors, you can make a circuit of it by saving the transistors that connect some points and eliminating the transistors that go elsewhere.

Toward this end, Mitra's team superimposed a grid over the layout of standard logic circuits. Then, for each type of circuit, team members identified the cells through which semiconducting nanotubes should pass if they are to be useful and the cells through which they should not pass. Using simulations, Mitra's team showed that etching away tubes in the undesirable cells could produce working logic circuits, even though the researchers did not know the exact arrangement of nanotubes in the grid. They produced a program that can automatically generate the pattern of good and bad cell locations in the grid. Problems still exist, of course. There's no way of knowing whether a given nanotube will be a transistor, a resistor, or a “pretty-good wire.” And there's no guarantee that a sufficient number of semiconducting nanotubes will connect the areas that must connect in a circuit.