High noon for FPGAs: Low-cost-versus- high-end showdown

Although the market for high-end, high-priced SRAM-based FPGAs has matured into a gentlemanly duel between FPGA veterans Xilinx Inc and Altera Corp, the emerging low-cost-FPGA market has turned into the FPGA industry’s version of the Gunfight at the OK Corral. Companies including Lattice Semiconductor and Actel Corp are fighting it out with each other as well as with Xilinx and Altera, increasingly adding advanced functions—traditionally the province of high-end, high-priced FPGAs—to their low-cost-FPGA families. In the very-high-end-FPGA market, customers mainly have a choice between either Xilinx’s Virtex devices or Altera’s Stratix family. In the low-cost-FPGA market, however, customers have many more choices and benefit from the stepped-up competition between the many vendors fighting it out for FPGA revenue. Today, customers can buy 1 million-gate FPGAs with high-speed I/O and processor or DSP capabilities for much less than $100 in low volumes and for tens of dollars in high volumes.

This competition has benefited users but has—and at least temporarily—come at the expense of the FPGA industry’s overall revenue. The media has widely covered the FPGA industry’s success at the ASIC market’s expense, replacing sockets that ASICs traditionally held. During the past year, however, the FPGA industry has had a dose of its own medicine, as the low-cost-FPGA market has quietly begun to take socket wins—and, thus, revenue—away from the high-end-FPGA market.

Bryan Lewis, research vice president with research company Gartner, notes that the FPGA industry has since 2002 sold a steadily increasing number of devices. However, Gartner predicts that the FPGA industry will show a decline this year, due in part to low-cost FPGAs’ replacement of sockets that high-end FPGAs traditionally held. “Low-cost-FPGA units are ramping fast, but their lower ASPs [average selling prices] are clearly having an impact on the dollar growth of the overall FPGA market,” says Lewis. “In fact, we now forecast 2007 FPGA/PLD [programmable-logic-device] revenues to decline 1.9%.” That anticipated decline is not due entirely to FPGA-industry cannibalism, he says. In 2007, the FPGA market underwent “the perfect storm,” says Lewis, simultaneously experiencing inventory, customer-consolidation, and pricing issues. He expects overall FPGA/PLD-market revenue to come roaring back in 2008 to post 14.4% revenue growth (Figure 1).

But the two biggest upstarts—and, some would say, spoilers—in the low-cost-FPGA market are Actel and Lattice, which are maintaining their push to add high-end functions in their low-cost devices, putting severe price pressure on Xilinx’s and Altera’s high-end FPGAs. Both Actel and Lattice claim that the large FPGA vendors have traditionally deliberately withheld high-end functions from their low-cost FPGAs to force users to buy their typically three-times-more-expensive high-end FPGAs. Both upstarts claim that the high-end-FPGA vendors are starting to buckle under the pressure, and one of the first signs of this surrender is Altera’s latest product introduction, the 90-nm Arria GX. The upstarts claim that Arria GX is simply a 90-nm Stratix II GX device with a different package. Although Altera concedes that it based Arria GX on a Stratix II GX architecture, the company says that the Arria GX lacks some of the features and performance of the Stratix II GX device. The company claims that it merely slimmed down the Stratix II GX to meet the right mix of performance, power requirements, and price to fulfill the needs of the market with the Arria GX. The Arria GX’s price falls between the company’s low-cost Cyclone and its high-end Stratix devices. “Lattice has changed the playing field for the SRAM guys,” says Martin Mason, director of silicon-product marketing at Actel. “It’s a market that Actel has not historically played in. But Altera and Xilinx have sold a lot of high-end devices into the market for high-speed I/O, and Lattice went in there overnight and took out one digit from the amount people could charge for high-speed SERDES [serializer/deserializer] products. I’m sure Xilinx and Altera are furious over the impact that [move] is having on the high-end business.”

Mason believes that the high-end-FPGA vendors are now experiencing a classic example of the innovator’s dilemma (Reference 1). “You have this market, you’re getting fat and happy in it, and someone comes in with a disruptive technology and starts taking market share away from you. Do you go in and try to compete with them by lowering your prices? If you do, then you actually trash the market that has gotten you where you are,” says Mason. “All of us in the FPGA market have been doing that to the ASIC market, but both we and Lattice have little to lose and everything to gain by introducing disruptive technologies against the Big Two in FPGAs.”

Xilinx and Altera are not throwing in the towel, however. Neither is content to simply replace high-end-FPGA sockets with low-cost FPGAs, and neither plans to reduce the prices of their high-end FPGAs to fend off competition from low-cost FPGAs. Each instead hopes to serve markets that FPGAs have not traditionally served (see sidebar “Low-cost FPGAs seek new markets”).

In 1998, Xilinx introduced the first low-cost FPGAs, the Spartan family, and aimed it squarely at replacing ASICs for production parts. Before the product’s release, IC-design engineers had used FPGAs mainly for prototyping ASIC designs and would ultimately implement those designs in cheaper, faster, higher capacity ASICs. In those days, PLDs lacked the performance, capacity, and power requirements for use in end products, and, more important, they were too expensive. At the time, many PLD vendors also offered low-cost CPLDs (complex PLDs), but performance and capacity limitations hampered—and still hamper—those parts. Still, some customers used them in sockets that older and less sophisticated ASIC devices traditionally held.

The Spartan family, however, opened a new market and offered formidable capacity, performance, and numbers of functions at a reasonably low price and thus started to displace midrange ASICs in end products. This scenario was especially true in applications that required versatility and reprogrammability and those requiring too few units to justify the cost of spinning an ASIC. Xilinx has shipped more than 230 million devices worldwide, according to Mark Moran, senior strategic-marketing manager for the General Products Division at the company. Those sales have yielded $2.1 billion in cumulative revenue with a compound-annual-growth rate of 36.2% from fiscal year 2000 through fiscal year 2006.

As foundries have introduced semiconductor processes that are more difficult to manufacture and more expensive to design, both the low-cost-FPGA and the high-end-FPGA markets have grown and have grabbed more sockets away from the ASIC market. When Xilinx jumped into the low-cost-FPGA market, Altera, Actel, and Lattice soon followed. The first devices they offered were traditional sea-of-gate devices that consisted mostly of reprogrammable logic. But, as new market opportunities opened, most of the FPGA vendors started to add hard-wired functions, such as microprocessors; DSPs; memory; high-speed SERDES; and support for popular interfaces, such as PCIe (Peripheral Component Interconnect Express), to their architectures to capture specific markets and one-up competitors in not only the ASIC market, but also the FPGA market.

The low-cost-FPGA shoot-out has indeed escalated the size, performance, low-power requirements, and number of advanced functions these devices have, yet they maintain a price that allows customers to justify using the devices rather than ASICs, standard-cell ASSPs (application-specific-standard products), or implementations that combine discrete functions on PCBs (printed-circuit boards). Creating low-cost FPGAs for emerging markets is difficult, and all the players offering low-cost FPGAs say it’s a balancing act to keep raising the bar on performance and features in ever-more-expensive process technologies. They must achieve this goal while keeping prices low enough that customers will find their devices attractive as production parts, rather than as prototyping parts for ASICs.

It’s a balancing act for FPGA customers, too. Although an FPGA may have a lower per-unit cost than an ASIC, customers must look closely at each device’s system requirements. Actel’s Mason, for example, is quick to point out that SRAM FPGAs remain power hogs and typically require users to add extra power-control circuitry and power bricks to their PCBs to run SRAM FPGAs. Some also need external boot-up memory, which may require users to buy an external boot device or to increase the boot-up requirements of their targeted processors. Customers for SRAM-based FPGAs must also heed the rule of 80%; that is, they must buy an FPGA that has 20% more gates than they require if they intend to hit the FPGA vendor’s advertised performance grade (Reference 2). Altera’s senior vice president of product and corporate marketing, Danny Biran, and Xilinx’s Moran, also point out that EDA software is a big differentiator in this market and that the smaller vendors’ design software lags behind the offerings of the big vendors. Biran also notes that transceiver-targeted FPGAs typically add complexity to users’ system designs; thus, FPGA vendors attacking this market must also offer software to help designers adequately program the devices into their systems. “If you look at the vendors offering these types of devices and then you look at the software they offer with the devices, it’s again a Coke-and-Pepsi market,” says Biran, referring to the long-standing so-called Cola Wars between Coca-Cola and Pepsi (Reference 3), an analogy describing the situation when two companies—in this case, Xilinx and Altera—dominate a mature market.

Although designers should be aware of some facts when shopping for devices in the low-end market, most FPGA-market pundits will likely agree that the FPGA industry as a whole is today fielding a brilliant array of low-cost devices for a growing number of applications and markets. Table 1 lists the latest low-cost-FPGA offerings from Actel, Altera, Lattice, and Xilinx. “You can get a lot of cool stuff for less than $20,” says Actel’s Mason.

First, take a look at what the old hands have to offer. Xilinx offers the Spartan, Spartan-2, and Spartan-3 generations of its high-pin-count, high-density, low-cost-FPGA device. With the introduction of each successive generation, Xilinx has broadened its portfolio to capture new markets. Of the FPGA vendors offering low-cost FPGAs, Xilinx has the broadest portfolio, fielding five versions of its 65-nm SRAM-based Spartan-3 family and multiple densities and speed grades for each version. The logic-optimized Spartan-3E is a traditional sea-of-logic-gates FPGA. The Spartan-3A targets I/O for high-speed applications, and the Spartan-3A DSP targets DSP applications. The newest addition to the lineup is the Spartan-3AN, which is essentially a Spartan-3E that Xilinx couples with a flash on an SIP (system in package) for nonvolatile-system applications. Although each device targets its own market segment, each shares flexible power-management modes for low cost, along with “device-DNA” security technology, which helps customers prevent theft of their designs.

As for the other veteran in the market, Altera offers its low-cost, SRAM-based Cyclone FPGA family, which debuted in 2002 in a 130-nm-process technology. The company in 2004 introduced the 90-nm Cyclone II and, in 2007, the Cyclone III in TSMC’s (Taiwan Semiconductor Manufacturing Co) 65-nm LP (low-power) process technology. As of press time, Altera offered eight speed grades of its Cyclone III products ranging from 5000 to 120,000 logic elements, with as much as 4 Mbits of embedded memory and as many as 288 DSP multipliers running at 260 MHz.

This year, the company also introduced its Arria line of FPGAs to target users needing reprogrammable devices with highly functioning, relatively low-cost transceivers. Arria GX has a higher price and better performance than Cyclone because it supports three protocols: PCIe, GbE (Gigabit Ethernet), and SRIO (Serial RapidIO).

Arria GX and the high-end Stratix II GX use the same logic fabric, transceiver technology, and process technology, but they differ in a number of ways: Arria GX is slower and is available in lower cost packages, and its transceivers support speeds of only 2.5 Gbps and have fewer functions. For example, Arria GX devices lack support for adaptive equalization, a feature you’ll find in Altera’s high-end Stratix II GX.

Lattice jumped into the low-cost-FPGA market at the end of 2002 with its 130-nm ECP (Economy Plus) family. The company last year followed up that introduction with the 90-nm ECP2 family and then this year with its ECP2M family. ECP2M adds two significant high-end features to the low-cost-FPGA market: hard-wired 3-Gbps SERDES and as much as 5 Mbits of on-chip memory, supporting DDR and DDR2 I/O, SPI (system-packet interface) 4.2 I/O, and hard-wired DSP support. Lattice also offers the XP and XP2 families, which debuted in 2005 and February of this year, respectively. The XP2 family marries an SRAM ECP2 architecture with a bank of flash memory on one die. “We are trying to make the SRAM-based FPGA plus its associated boot-flash memory about the same price as its equivalent nonvolatile product,” says Gordon Hands, director of strategic marketing an Lattice, who notes that the XP is similar to Lattice’s original ECP family and that the XP2 is similar to the ECP2 devices but with slightly smaller density.

While Xilinx, Altera, and Lattice battle it out in low-cost, SRAM-based FPGAs, Actel, which offers flash-based devices, is content to broaden its low-cost-FPGA-market reach into applications requiring security and low power consumption. Flash-based FPGAs have traditionally been slower than SRAM-based FPGAs, but flash-based devices consume less power and are more secure than SRAM-based devices. The company’s low-cost ProASIC3 FPGA focuses on the combination of low power, security, and relatively high density and is available in seven versions, with densities of 30,000 to 1 million system gates. The company based its flash-based Igloo FPGA family, which debuted last year, on the ProASIC3 but with added modes to further reduce power. The smallest device in the Igloo family, the AGLO30, can operate on as little as 5 µW, and the largest device operates at less than 1 mW, which is two or three orders of magnitudes lower than its SRAM competitors.

Actel also has an agreement with ARM that allows users to place a hardened ARM7 core on Actel’s FPGAs for very-low-power use. “When you put an ARM processor on the device, you can get as low as 24-µA standby current for that implementation. The business model allows Actel to provide the ARM processor to customers free of royalty, licensing, and price,” says Actel’s Mason.

Quicklogic no longer considers itself an FPGA vendor, but its low-power PolarPro and ArcticLink CSSPs (customer-specific standard products) are worth mentioning. The one-time-programmable devices function as extremely low-power “sandman” devices—turning off power to parts of handheld systems when they are not in use, thus conserving a given system’s overall power consumption. The PolarPro devices boast 10 µA of static-power consumption, 15 mA of active-power consumption, and 10 µA of dynamic-power consumption. ArcticLink devices essentially marry a PolarPro programmable array with hard-wired functions on a die targeting markets for low-power systems.

Overall, in recent years, the FPGA industry has done remarkably well taking share away from the ASIC market and giving users a very-low-cost and relatively stable alternative for quickly designing innovative next-generation products. Historically, customers, the media, and the financial community have measured FPGA-vendor success by a company’s ability to be first to market with high-end devices on the latest silicon processes. However, as companies such as Lattice and Actel introduce low-cost devices with high-end features and increase pressure on Xilinx and Altera to follow suit, industry participants may soon define FPGA success by a vendor’s ability to serve emerging markets with the right mix of features, performance, power savings, and price that customers find reasonable for production use.