News and New Products
MEN Micro extends universal-submodule concept
By Warren Webb, Technical Editor -- EDN, 1/16/2008
Designing unique I/O-mezzanine modules for each application can be expensive and time-consuming. MEN Micro attacks this problem with a USM (universal-submodule) concept that it based on reconfigurable-FPGA architecture. Products employing the USM concept use one or more IP (intellectual-property) cores in an FPGA to help designers easily and quickly turn individual I/O requirements into production-ready products, reducing design time and costs. MEN Micro now offers its FPGA-based USM concept on two additional mezzanine cards: the P699 XMC and the P598 ccPMC (conduction-cooled PMC). The use of Cyclone FPGAs on the two new cards enables diverse I/O combinations in a small space for moderate volumes and at a low cost.
The P699 XMC uses a Cyclone III FPGA with 24,624 logic elements, and the P598 ccPMC features a Cyclone II with 33,216 logic elements. IP cores allow users to change the functions of either card without any hardware modifications to the main module. The corresponding line drivers reside on the individually designed USM submodule that plugs into the main XMC or ccPMC. A Nios soft-core processor, which features 32 Mbytes of main DDR2 SDRAM memory and 2 Mbytes or 4 Mbytes of flash memory for the P598 and P699, respectively, resides on the FPGA, providing local intelligence to the main module. A USM-development package includes a main PMC with a USM submodule; test hardware; and an FPGA package with a Nios CPU, memory control, connection to the PMC, Avalon/Wishbone bridges, and detailed documentation. The product comes with MEN’s Wishbone bus-maker tool for developing IP cores on the standard Wishbone bus. Prices for a USM-development kit start at $2993.













