ASM details atomically engineered single-metal gate stack

High-k dielectrics, integrated with metal gates allow faster and smaller chips meant for high performance servers and advanced products that require low power such as laptops, PDAs and smart-phones.

By Ann Steffora Mutschler, Senior Editor -- Electronic News, 5/19/2008

To allow 32-nm generation high-k metal gate stacks using a single metal, instead of the two different metals required previously for CMOS, semiconductor manufacturing equipment maker ASM America Inc, a subsidiary of Bilthoven, Netherlands-based ASM International NV, detailed today its atomic layer deposition (ALD) process that implements lanthanum oxide (LaOx) and aluminum oxide (AlOx) high-k cap layers.

The company reminded that high-k dielectrics, integrated with metal gates allow faster and smaller chips meant for high performance servers and advanced products that require low power such as laptops, PDAs and smart-phones.

With patents pending on the new LaOx and AlOx cap processes that were built to address the challenges associated with metal gates at 32-nm geometries and below, ASM explained that without cap layers, two different metals are needed to create the proper electrical characteristics of both sides (p and n) of the transistor switch.

However, by introducing an ultra thin cap film between the hafnium based gate dielectric and the metal gate, atomic level charges will affect the interaction between the dielectric and the metal, which can be tuned by varying the cap film’s thickness in a range less than 1-nm.

As such, the process control capability required to achieve such ultra-thin films requires the most advanced ALD technology.

“Solving the integration challenges for high-k metal gates is a top priority for most of our customers. This new process greatly simplifies the high-k metal gate integration and allows us to support gate first, as well as gate last process flows. ASM now offers ALD processes for the high-k dielectric, cap layer, and metal gate,” noted Glen Wilk, transistor product manager at ASM, in a statement.

ASM said it is running these new processes at several customer locations, and demos are available in ASM’s applications lab.