The hot-swap serial-interface circuit in Figure 1 allows two computers to see all of the communication between each computer and each device on the communication network for that serial port. This circuit allows each computer to determine what the other is doing and receive all of the data from the peripheral device. Only one device can transmit at a time; otherwise, the transmitted data becomes corrupted. This circuit allows two computers in a hot-swap configuration to know when to become the master computer. When the master computer fails, the slave computer stops receiving the data requests that the master supplies, and the slave then becomes the master. This approach allows for computer redundancy in applications in which a master computer that is communicating with an RS-232 device must always be operating. When you replace the failed computer, it “hears” that a master computer is communicating with the device and operates in slave mode while waiting for the current master to fail.

This circuit allows two DTE (data-terminal-equipment) computers to use one DCE (data-communications-equipment) RS-232 peripheral device. This device is usually a communication interface, such as a UHF radio or an RS-232-to-RS-485 converter. The board requires 9 to 15V dc to operate. You must provide this voltage on Pin 9 of the peripheral RS-232 device.

The transmitted RS-232 signal from the peripheral device converts to a TTL signal through level converter IC₂ and feeds into an AND gate. The output of this AND gate feeds into two inputs of another level converter, IC₄. These RS-232 outputs travel to the input lines (Pin 2) of the two monitoring computers. When one of the computers transmits on Pin 3 of its serial port, its output converts to TTL levels with IC₄. The TTL-converted outputs of both computer serial ports feed into an AND gate. The default, or off, level for a computer serial port is –12V dc. The level converter inverts the signal as part of the conversion to TTL levels. This action makes the default a high level going to the AND gate, allowing the data on the other input of the AND gate to pass to the output of the AND gate.

The output of this AND gate goes to the second input of the AND gate that receives the output of the peripheral device as well as the input into the level converter going to the input of the peripheral device at Pin 3. This action enables the output of one of the two computers to return to the computer that transmitted the data as well as to the other computer and the peripheral device.