Shouldering the burden to stay on track with Moore's Law
Innovators 2008: Applied Materials' Mark R Pinto sets the technological direction for the market-leading capital-equipment company.
By Ann Steffora Mutschler -- EDN, 6/26/2008
Mark R Pinto, PhD, senior vice president, chief technology officer, and general manager of energy and environmental solutions at semiconductor-, solar-, and display-manufacturing-equipment supplier Applied Materials Inc, has his work cut out for him: Market researchers expect that 2008 will see spending for semiconductor-manufacturing equipment fall by nearly 20% on a worldwide basis due to a weakening US economy and volatile memory market. The situation will present new challenges to efficiently running businesses and still preparing for the next generation of semiconductor-manufacturing technology.
Responsible for setting the technical direction for the market-leading capital-equipment company, Pinto has helped steer Applied to new market opportunities in solar cells and displays and still maintain a focus on its core silicon business and technical strengths. Wall Street sees the new market opportunities as largely responsible for sustaining the company during a low point in the semiconductor-business cycle.
A key issue in Applied's drive to develop new technologies, Pinto says, is the continuation of the evolution of the silicon business, which is still about Moore's Law and integration. Reducing the cost per transistor, he says, is “the most fundamental aspect of what we do as an industry.”
With that focus has come an increasing amount of innovation, particularly in materials science. Applied's silicon business faces new challenges to stay on the Moore's Law curve, and the company has the responsibility to shoulder the continually increasing burden of the semiconductor-equipment industry to innovate, he notes.
“When you look back 30 years at the equipment industry and what we were doing then versus what we do today, a lot of the burden has shifted at the same time more innovation has been required with materials. That's the big challenge: how we continue to help the industry move forward and to take on a significant part of that burden,” Pinto says.
At the same time, he explains, as companies are implementing those new materials, the pace of development hasn't changed. “The need to be productive is as high as or higher than ever because new technologies, such as dual-patterning, require more steps than existing manufacturing processes. To get the costs to continue to come down, we as an industry have to be more productive if we are adding more steps,” Pinto asserts.
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“We work at picking the best opportunities to keep things going. We've been able to be more focused on what we choose to invest in in terms of the breadth of products. Within each product group, we have to invest in the future, but [in the past] when we were looking for growth opportunities and didn't have the new market opportunities [such as solar], our only way to grow faster than the rest of the industry was to try to be in everything. We don't have that philosophy today. We've picked some things to be in. We've picked some things that we are not going to continue right now,” he says.
One of those areas that Applied has chosen to focus on outside the traditional silicon business is solar. “The solar opportunity has existed for 20 or 30 years, at least. What changed was that we felt there were some opportunities that fit what Applied is best at doing, [such as] doing things with thin films and nanomaterials on a large scale, repeatedly, at low cost,” Pinto says.
Applied believes that it can truly enable markets in thin films and processing. The company recognizes that the business differs from making equipment for ICs, but it has been able to draw on its experience in displays to give it a good foundation. “We were fortunate to have entered the display market in the early '90s, although, truth be told, it wasn't so much that we did a bunch of analysis and decided to go after it; customers came to us and pulled us in—the Japanese customers in particular,” he recalls.
Interestingly, at that time, the size of glass substrates used to make displays was about the size of a laptop, which didn't seem like a stretch for Applied. “But what we didn't expect was that, every year after that, [the substrate] got bigger and bigger and bigger,” Pinto says. Comparatively, the substrate on the world's biggest display factory today is 5.5m2, and the largest substrate used in Applied's SunFab solar-cell-manufacturing line is 5.7m2, which is about the size of a garage door—a far cry from the early days of its foray into thin-film applications.
The work with thin film in display applications led to a key understanding that the major drivers for lighting, solar, and displays are cost and cost per area, which led the company to pursue nanoprocessing on big materials on big equipment as a way to achieve cost-effectiveness.
“Through both our developments and acquisition building off the base that we had in displays, there is a lot of capability in doing nanoscale-controlled materials on very large areas. That's been a major part, from an underlying technology point of view, for a lot of what we are doing in solar, display, and other applications. We used the same kind of process technologies. We are depositing silicon or dielectrics or metals, but they have to be adapted in ways to do it on very large areas,” Pinto says.
Currently, Applied is developing products for both wafer-based crystalline silicon and thin film on glass, which focuses more on ultralow-production cost. “In both cases, we're working on lowering the process cost per area by going to big tools, very high throughput, and better materials. For thin film, it is especially enabled by the large size. In both cases, we are working on the conversion efficiency with the same goal in mind: If you can increase the efficiency and do it at a more significant cost reduction to get a bigger bang for the buck … that's the trick. How do you get the two to happen together? For crystalline silicon, the trick is how you do it on thinner and thinner silicon. What you want to do is go to very thin wafers,” he explains.

















