News and New Products

Instrument performs jitter-tolerance tests on forwarded- and embedded-clock designs

By Dan Strassberg, Contributing Technical Editor -- EDN, 1/29/2009

Agilent Technologies calls its new serial, high-performance J-BERT (bit-error-ratio tester) N4903B the only complete jitter-tolerance tester for high-speed serial interfaces that operate at rates as high as 12.5 Gbps. The instrument enables you to accurately characterize and test compliance of next-generation devices that support multigigabit-per-second serial-bus standards, such as PCIe (peripheral-component interconnect express) 2.0, USB (universal serial bus) 3, QPI (QuickPath interconnect ), Hypertransport 3, and FB-DIMM (fully buffered dual-inline-memory module) 2. According to Agilent, the instrument’s high characterization accuracy enhances the robustness of the design under test.

Forward-clocking architectures, such as QPI, Hypertransport, and FB-DIMM 2, operate with forwarded clocks that run at half the data rate, confronting design teams with additional test challenges when characterizing receivers under real-world stress conditions. The N4903B characterizes the jitter tolerance and margins of such receivers by providing half-rate clocks with variable-duty-cycle distortion to emulate the effects of nonideal clocking. The instrument allows users to inject adjustable-phase jitter on the data signals and the forwarded half-rate clock.

The rapid data rates of next-generation high-speed embedded-clocked computer and video buses, such as PCIe 2.0, USB 3, DisplayPort, and SATA (serial advanced-technology attachment) 6G (graphics), require sophisticated jitter injection and signaling during testing and validation. The N4903B addresses these needs by offering more calibrated, built-in jitter-injection and signaling capabilities than did earlier instruments.

The unit also offers many integrated and calibrated jitter sources with spread-spectrum and residual-spread-spectrum clocking; selectable random jitter that has PCIe 2.0-compliant spectral distribution; single- and two-tone periodic jitter; bounded, uncorrelated jitter; and built-in sinusoidal and intersymbol interference. Additional features include compliant jitter injection for testing the latest serial-bus receivers, such as those for PCIe 2.0, USB 3.0, SATA, and DisplayPort; accurate total-jitter measurements with built-in clock/data recovery that has tunable loop bandwidth; easy adaptability to the device under test by emulating electrical-idle conditions and providing variable voltage levels on supplementary trigger and auxiliary-data outputs; faster execution of long test sequences, thanks to a 60-block pattern sequencer; and investment protection through upgrades from the manufacturer’s N4903A, which the N4903B replaces.

You can order the N4903B beginning in March 2009. Prices start at $139,000 for the 7-Gbps version, and $179,000 for the 12.5-Gbps version.