News and New Products

AFS Nano speeds 5000-element design simulations

By Rick Nelson, Editor-in-Chief -- EDN, 2/19/2009

Berkeley Design Automation has announced its AFS Nano, a version of the company’s AFS (Analog FastSpice) with a 5000-element capacity limit that costs only $1900 for a one-year license. Targeting IC-block-level designers using Linux or Solaris platforms, AFS Nano includes Synopsys HSpice and Cadence Design Systems Spectre netlist support. It also features Cadence Virtuoso ADE (Analog Design Environment) integration. AFS Nano performs ac, dc, noise, transient, sweep, and Monte Carlo analyses.

AFS Nano enables IC designers to design and characterize their blocks at least two times faster than and for a fraction of the cost of other Spice simulators, the company reports, adding that it can deliver foundry-certified true-Spice-accurate waveforms five to 10 times faster than competing simulators for even moderately sized blocks—for instance, those having 1000 elements. The company estimates that engineers use 50% of Spice simulators for block-level runs that would comfortably fit within AFS Nano’s capacity limit. (For more on AFS, which supports 1 million-element analog, mixed-signal, and RF designs, see “Simulation gets speed, capacity boost,” EDN, Jan 22, 2009, pg 26.)