News and New Products

DDR3 test suite features 2G transfer/sec logic-state analysis

By Dan Strassberg, Contributing Technical Editor -- EDN, 3/3/2009

Agilent Technologies has introduced a comprehensive DDR (double-data-rate) 3 protocol-debugging and validation-test suite for digital-system designers who develop computer and embedded-memory applications. The test platform includes the 2-GT/sec (gigatransfer/sec) 16962A plug-in logic-analysis module for the company’s 16901A and 16902A logic-analyzer mainframes. The test suite also includes a probing portfolio for DDR3 BGAs (ball-grid arrays) and DIMMs (dual-in-line memory modules) and a DDR3-compliance and -performance-measurement environment.

The test suite enables research and development engineers who integrate memory controllers with the DDR-memory devices in the memory subsystem to perform interoperability testing. This testing is a major challenge for many designers because manufacturers often develop the memory-controller design in-house and integrate it with IP (intellectual property) they acquire from third parties.

Within the past year, the use of DDR3 has significantly increased in both computers and embedded-memory designs because DDR3 devices provide higher performance and consume less power than do previous-generation DDR2 devices. To ensure that the technology is testable, engineers must take into account test-and-measurement requirements when they write specifications for complex, high-speed computer systems. Measurements are central to diagnosing problems and proving that the corrections to those problems work correctly. By contributing to standards groups, such as JEDEC (Joint Electronic Device Engineering Consortium), Agilent ensures that new designs are testable and guarantees that the company’s products ensure specification compliance.

The DDR test suite, which includes the $38,135 16962A module with 4 million-pattern memory, 2-GT/sec state speed, and 2-GHz trigger-sequence speed, reliably triggers on and captures 1.6-GT/sec DDR3 1600 signals. When designers use this module with the new DDR3 probing system and analysis software, it provides full test capability for system integration in the memory industry. On embedded-system designs, the W3630A-series DDR3 BGA probes, with prices starting at $400, provide direct access to the DRAM contacts with low capacitive loading and minimal impact on signal integrity. The probes work with oscilloscopes and logic analyzers to perform physical-layer and functional tests. In server and desktop applications, the $40,800 N4835A DDR3-slot interposer enables nonintrusive memory-bus access through a slot connector at speeds to 1.6-GT/sec. The slot interposer provides quick and easy access to industry-standard DDR3 DIMMs, including 240-pin packages.

In addition to announcing an ensemble of DDR-testing hardware tools, Agilent is introducing what it calls the industry’s first DDR2 and 3 protocol-compliance and analysis software tool, the $5500 B4622A, which will help to reduce memory designers’ troubleshooting time and increase productivity and efficiency in DDR-design validation. This tool, which works with all of the manufacturer’s current DDR2 and 3 test equipment, provides timing and protocol-violation checks, automated physical-address-trigger setup, and an overview of system performance through bus-statistic information and a histogram view of address access.