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Embedded instruments target product life cycle

EDN Innovator of the Year finalist Glenn Woppman describes technologies and partnerships that validate the embedded-instrumentation concept for chips, boards, and systems.

By Rick Nelson, Editor-in-Chief -- EDN, 3/19/2009

EI (embedded instrumentation) shows promise for supporting design debugging, validation, and testing for chips, PCBs (printed-circuit boards), and systems, according to Glenn Woppman, president and chief executive officer of Asset InterTech. Woppman, a 2008 EDN Innovator of the Year finalist, last year scored several EI accomplishments as he positioned his company to help drive the emergence of EI through technology developments and partnerships with EDA companies and semiconductor manufacturers. He recently discussed Asset’s history and 2008 accomplishments, sketched out a road map for 2009, and offered advice on how to facilitate innovation—whatever field you are in.

Woppman’s work on what he describes as nonintrusive technology had its roots in the early 1990s, when he led a Texas Instruments team that contributed to the development of the IEEE 1149.1 boundary-scan standard. He then led the first employee spin-off in TI history, which gave birth to Asset InterTech in 1995, enabling the new independent company to offer its flagship ScanWorks boundary-scan tool to customers working with boundary-scan-compatible devices from multiple semiconductor manufacturers.

Boundary scan, which in its original incarnation provided shorts-and-opens testing as physical access disappeared, came into its own with the increasing popularity of BGA (ball-grid arrays) in the late ’90s, which prevented physical test-probe access to buried solder balls. Boundary-scan tools continue to provide shorts-and-opens testing; the technology provides electrical access to buried nodes on dense PCBs through the IEEE 1149.1-defined TAP (test-access port). But the TAP, as Woppman and his counterparts at other companies realized, also provides a window into ICs that can serve uses ranging from in-system device programming to accessing internal embedded instruments.

Focusing on EI in ’08

Woppman focused on this application in 2008, earning himself selection by EDN editors as one of four EDN Innovator of the Year finalists. The year didn’t mark the company’s first foray into the EI field; in 2004, Asset adapted its ScanWorks software to support Intel’s IBIST (interconnect built-in self-test). But Woppman in 2008 repositioned his company to aggressively address the EI market. As part of the effort, he hired EI technologists from the Inovys operation of Verigy. He also established partnerships with EDA companies Mentor Graphics, Cadence Design Systems, and Synopsys, as well as with semiconductor makers Avago Technologies and Maxim Integrated Products.

"We are really trying to make an impact over the entire life cycle of a chip, board, and system by reusing embedded instruments from chip design all the way through the system-integration phases and out into field service."

Glenn Woppman
Asset InterTech

Woppman attributes the need for EI in part to Moore’s law: “Semiconductor technologies are enabling new applications for consumers that never existed before, but, along with the applications come test and debug and validation challenges that weren’t there before either,” he says. “Our thrust has been to get a better understanding of the issues involved through participation in standards bodies such as the IEEE P1687 working group,” which focuses on establishing a standard access mechanism for EI.

EI benefits extend well beyond chip debugging and testing. “We are really trying to make an impact over the entire life cycle of a chip, board, and system by reusing embedded instruments from chip design all the way through the system-integration phases and out into field service,” he says. “We think embedded instrumentation has a huge value, and our customers and partners seem to think so, too, based on their participation in the P1687 group.”

Woppman outlines key accomplishments for 2008: “On the semiconductor side, we were successful in proving out the I/O-instrumentation part of our vision by working with the Nehalem platform and QPI [QuickPath Interconnect] that Intel has developed,” he says. Asset also developed and announced ScanWorks support for Avago Technologies’ ASICs that incorporate QPI SERDES (serializer/deserializer) cores. Similarly, Asset adapted ScanWorks to support margining and forensics capabilities for several of Maxim Integrated Products’ system-monitor and system-manager devices.

As for 2009, Woppman says, “We will continue to grow our partnerships on the semiconductor side with regard to I/O embedded instrumentation. In addition, we will begin to engage with our EDA partners and with customers around the core instruments initiative” based on the emerging 1687 standard. “Last year, we brought the concept of embedded-I/O instruments from belief to reality, and this year we want to turn the concept of core instruments from belief to reality,” he says.

Fostering innovation

“If you look at technology companies, you’ll find what I call the inside-out syndrome,” says Woppman. “You’ve got smart engineers, who see a problem and go for a solution, and they often hit the mark, but sometimes the business case for their solution just isn’t there.” A better approach, he says, is an outside-in one, in which a company solicits input from the market before developing a technical solution to a problem.

Woppman describes how the outside-in approach works at Asset. “One of our challenges was that we saw that the boundary-scan business was growing but wasn’t going to be huge,” he says. “So, we asked ourselves: How do we take our core competency and expand into other areas that could provide value for our current customers and attract new customers? We went through the process of really talking to a lot of different companies representing our customers and potential customers as well as our partners and potential partners.”

Outside input, Woppman says, is necessary but not sufficient: “You’ve got to put some chips on the table. The Intel test director [Ashoke Seth] made a similar comment at Semicon West two years ago. He said that the IC ATE [automated-test-equipment] companies needed to place some bets on what the industry will need in the future. He noted that not all the bets are going to pay off for you but that you’ve got to put your chips on the table. And I think he was dead-on” (Reference 1).

Nevertheless, outside-in networking remains indispensable in helping to decide which bets to place. “You have to network and talk to a lot of people in the industry to try to figure out the trends you can exploit using your core competency,” he says. “And you might identify trends that require a core competency you don’t have, but you might be able to add that competency.” Asset accomplished that goal in late 2007 when it acquired International Test Technologies to gain emulation expertise and in 2008 by hiring embedded-instrument experts.

EI convergence

Woppman sums up the innovation he’s seen throughout the last year: “We’ve seen a convergence in this space among the different types of instrument IP [intellectual property], BIST IP, and so forth, all of which help the semiconductor side of the process through design simulation and on through IC-ATE test. Then, as the chip moves from the semiconductor production side to PCB assembly, embedded IP can be reused for functional tests, including microprocessor emulation or SERDES BER [bit-error-rate] testing. Of course, boundary scan still performs structural shorts-and-opens testing and is invaluable in improving yield in complex multiprocessor SOCs [systems on chips] and SIPs [systems in packages]. Ultimately, what we will see is an actual convergence of different test and instrumentation and debug capabilities within chips, within boards, and within systems that we’ll be taking advantage of. The seed was planted with the IEEE 1149.1 boundary-scan initiative back in the early ’90s, and now that seed has many trees, and those trees are growing.”


Reference
  1. Nelson, Rick, “Intel’s Seth urges proactive test investment,” Test & Measurement World, July 10, 2007.


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