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Voices: Signal-integrity experts speak out
Two experts discuss signal-integrity challenges and their expectations for signal integrity.
Interview conducted and edited by Paul Rako -- EDN, 4/23/2009
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Greg Edlund |
Larry Lerner |
When you use the term “signal integrity,” what do you mean?
(Edlund) In the most general sense, signal integrity is the branch of engineering having to do with the reliable transfer of data between two chips. By necessity, it also encompasses chip-to-chip timing and power-distribution networks.
Is signal integrity a big problem, and is it specific to your area of design?
(Lerner) If you like fast computers and fast downloads, you should care about signal integrity. Computer, data-center, and telecom equipment contains tens or hundreds of chips that have to communicate with each other with multigigabit-per-second data rates and a low bit-error rate. Preserving signal integrity is a challenge because, at today’s data rates, [you must mitigate] electromagnetic impairments previously only seen in the microwave-frequency range. Attenuation, reflections, and crosstalk must be countered by prelayout- and postlayout-design optimization and by introducing new techniques, such as impedance matching, pre-emphasis, and equalization. Chip-to-chip connections are mini communication systems. It’s a challenge wherever you have chips communicating at high speed.
Do you have signal-integrity specialists at your company, or do you consider signal integrity a part of a design engineer’s skill set?
(Lerner) Although, in some companies an engineer wears many hats, signal-integrity engineering is increasingly becoming a specialty.
What is the nastiest signal-integrity problem you have seen?
(Edlund) Signal-integrity problems come in two flavors: those with a single dominant root cause and those with many small contributing factors of roughly equal size. Each kind can be equally devastating, but the second flavor is particularly difficult to diagnose because it involves in-depth knowledge of how much each factor contributes to the erosion of operating margin and how they interact with one another.
(Lerner) We see two pinch points currently: For cost-driven consumer applications, the parallel buses, such as DDR, take the most space. It’s tempting to compact them, but the risk is postlayout failure. To avoid re-spins, we’re seeing a lot of predictive postlayout verification using EM [electromagnetic] simulators, such as [Agilent’s] Momentum. For performance-driven applications, the pinch points are prelayout-design-space exploration and optimization of the serial links. In this case, we’re using sophisticated signal processing to get the links to work at about 10 times the speed of DDR. But there are many parameters to tune: pre-emphasis, interconnect design, equalization. The tool for this task is [Agilent’s] Channel Simulator. It’s a two-step simulation with a Spice-like phase that first extracts an FIR [finite-impulse-response] model from the circuit using an impulse response and then runs bit patterns through the extracted model.
What is your company doing to solve signal-integrity problems?
(Lerner) We help signal-integrity engineers be productive by offering a complete signal-integrity workflow—no more stringing point tools together with sealing wax, bailing wire, and PERL [Practical Extraction and Report Language] scripts.
What recommendations do you have for design engineers to protect them from signal-integrity problems?
(Edlund) My recommendation is to reach beyond models and simulations to understand the physics of failure. It is imperative for signal-integrity engineers to have a clear picture of how various failure mechanisms combine and the relative size of each contribution. This information is not easy to come by. It involves designing test hardware, using it to characterize components in the lab, and linking component behavior to system performance.
(Lerner) Iterating the hardware to success isn’t the answer. You need the insight and what-if capabilities of simulations—verified against measured prototypes, of course—to be first to market.
What do you see in the future for signal integrity?
(Edlund) The electromagnetic behavior of interconnect systems is becoming more difficult to subdivide into independent components. Signal-integrity engineers need to understand how components interact with each other so they don’t miss important effects by making the models too small. In the future, successful signal-integrity engineers will use 3-D field solvers in the same way they used Spice in the early days: to enhance their understanding of system behavior. This implies that the cost of 3-D field solvers needs to fall to make them accessible to more engineers.
(Lerner) There’s always a “more” to higher speed, but, in addition, the workflow must grow in capability to encompass not only signal integrity, but also power integrity, EMC [electromagnetic compatibility], and EMI [electromagnetic interference].
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