News and New Products

DSP engine sports hybrid-SIMD/VLIW operation with ITU compatibility

By Robert Cravotta, Technical Editor -- EDN, 8/25/2009

Tensilica’s dual-16-bit-MAC (multiply/accumulate) ConnX D2 DSP engine integrates with the company’s Xtensa LX processor core. The DSP core supports modeless switching between SIMD (single-instruction/multiple-data) and VLIW (very-long-instruction-word) formats. The VLIW format supports two pipeline executions, in which one may be an SIMD operation, with register moves and operations such as autoincrement loads. The DSP engine provides 1-to-1 mapping support for ITU-T (International Telecommunications Union-Telecommunications) reference-code intrinsics, as well as a 1-to-1 mapping to most intrinsics for Texas Instruments C6x family. The ConnX D2 engine primarily targets the telecom infrastructure and VOIP (voice-over-Internet Protocol) applications.

The ConnX D2 DSP-engine option adds dual 16-bit MAC units and an eight-entry, 40-bit register file to the base architecture of the Xtensa LX DPU (data-plane-processing unit). It supports 16-, 32-, and 40-bit integer and fixed-point; 16-bit complex; 8- and 16-bit vector-data types; and seven addressing modes. The ConnX D2 engine instructions include add/compare-exchange with Viterbi, add modulo, add subtract, and add bit-reverse base. The two-cycle, fully pipelined MAC unit has a throughput of one instruction per cycle. Algorithms using complex arithmetic experience a two-cycle/instruction throughput with a latency of four cycles.

An Xtensa processor with the ConnX D2 DSP engine can operate at clock speeds as high as 600 MHz in 65-nm GP (general-purpose) technology. When optimized for low area, a fully configured Xtensa LX with ConnX D2 engine can occupy as little as 0.18 mm² fully routed in 65-nm GP process technology. When optimized for low power, a fully configured Xtensa LX core with the ConnX D2 DSP engine can operate at 52 μW/MHz in 65-nm GP process technology, which Xtensa measured by running an AMR-NB (adaptive multirate-narrowband) VAD2 (voice-activity-detection 2) algorithm. The ConnX D2 DSP option for the Xtensa LX processor will be available next month.