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PSoC available on standard 8- and 32-bit architectures
By Robert Cravotta, Technical Editor -- EDN, 10/2/2009
Cypress Semiconductor’s PSoC (programmable system-on-chip) processors not only enable developers to dynamically reconfigure digital-logic blocks to form custom digital peripherals during runtime, but also support dynamically reconfigurable analog blocks to form custom analog peripherals—also during runtime. The runtime reconfigurability of PSoC peripheral blocks enables developers to reuse silicon resources for multiple tasks for different application modes. Until recently, Cypress integrated this flexibility only in its proprietary M8C processor architecture. The new PSoC 3 and PSoC 5 family of devices expands the list of integrated processor architectures with an 8-bit, 33-MIPS 8051 and a 32-bit, 100-Dhrystone-MIPS ARM Coretex-M3 core, respectively.
Like with the original PSoC devices, developers can dynamically reconfigure the high-precision, programmable analog blocks on the PSoC 3 and PSoC 5 devices during runtime into precharacterized, 12- to 20-bit-resolution delta-sigma ADCs with a sample rate as fast as 1M sample/sec for a 12-bit SAR (successive-approximation-register) ADC, 8- to 10-bit DACs, transimpedance amplifiers, mixers, one to 50× PGAs (programmable-gain amplifiers), op amps with 25-mA drive capability, and as many as four comparators with 30-nsec response time. Likewise, the programmable digital blocks are reconfigurable as 8-, 16-, 24- and 32-bit timers, counters, and PWM (pulse-width modulators), as well as more advanced digital peripherals, such as CRC (cyclic-redundancy check), PRS (pseudorandom-sequence) generators, and quadrature decoders. These new families also support communications interfaces, including full-speed USB (Universal Serial Bus), I2C (inter-integrated circuit), SPI (serial-peripheral interface), UART, CAN (controller-area network), LIN (local-interconnect network), and I2S (inter-IC sound), and some devices include integrated PHY (physical)-layer interface for CAN and full-speed USB 2.0. Both architectures support a 0.5 to 5.5V operating voltage. Sleep-mode power consumption is 1 μA for the PSoC 3 and 2 μA for the PSoC 5. Power consumption for hibernate mode is 200 nA for the PSoC 3 and 300 nA for the PSoC 5. Both families are pin- and application-programming-interface compatible with the 8- and 32-bit architectures, including programmable routing that allows you to route any signal, whether analog or digital, to any general-purpose I/O and to route the LCD-segment display and CapSense (capacitive-sensing) signals to any GPIO (general-purpose-input/output) pin.
The PSoC Creator IDE (integrated development environment) builds on the growing development-support resource that the company has been building for the original PSoC 1 devices, and it supports development for the PSoC 3 and PSoC 5 families. The tool combines a graphical design editor with a library of dozens of preconfigured analog and digital peripherals, so that it can automatically route all of the on-chip signals to the appropriate pins and logic blocks without requiring the software developer to completely understand the underlying implementation. The PSoC Creator includes the bundled Keil CA51 compiler for PSoC 3 and the GNU GCC-ARM compiler for PSoC 5. Real-time-operating-systems support includes Keil’s RTX51Tiny, Micrium’s μC/OS-II, and Segger Emboss..com
The PSoC 3 devices are now available for sampling, and production quantities should debut in the first quarter of 2010. PSoC 5 samples will be available in the first quarter of 2010, and full production will begin in the second half of the year. Package options include 100-pin TQFPs, 48- and 68-pin QFNs, and 48-pin SSOPs. Cypress offers two design kits that are available today. The $49 PSoC 3 FirstTouch CY8CKIT-003starter kit includes an array of sensors, I/Os, projects, and software in addition to SWD (serial-wire debugging), an accelerometer, a thermistor, proximity sensing, CapSense, a 12-pin wireless module header, and 28 GPIO pins. The $249 PSoC CY8CKIT-001) development kit supports the entire PSoC line, including PSoC 1, PSoC 3, and PSoC 5 devices. The kit contains a main PSoC-development board and processor-module boards for the architectures. It also includes a MiniProg3 debugging and evaluation device, prototyping cable kit, a USB cable, a 12V-ac power adapter, both the PSoC Creator and PSoC Designer software, and sample projects.
