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Agilent ADS channel simulator mode determines ultralow bit-error rate in seconds

The ADS channel simulator's new statistical mode supports the design and verification of high-speed, chip-to-chip data links found in most consumer and enterprise digital products produced today.

By Rick Nelson, Editor-in-Chief -- EDN, 10/20/2009

Agilent Technologies has introduced a new statistical mode for its signal integrity Channel Simulator tool. The mode, offered as part of Agilent's Advanced Design System (ADS) 2009 Update 1, supports the design and verification of high-speed, chip-to-chip data links found in most consumer and enterprise digital products produced today—from laptop computers and data center servers to telecommunication switching centers and Internet routers. By accelerating simulation, the new Channel Simulator allows manufacturers of such products to quickly explore and arrive at an optimal design, and it eliminates the need for costly and time-consuming prototype iterations.

In order to select the optimum set of characteristics for a transmitter, channel and receiver, today's signal integrity engineers need to determine ultralow bit-error-rate (BER) contours for thousands of points in the design space. Traditional techniques used to accomplish this task consume a prohibitively long simulation time.

"The new statistical mode in our Channel Simulator eliminates the need for long, multimillion-bit simulations," said Colin Warwick, signal integrity product manager in Agilent's EEsof EDA organization. "Now engineers can generate eye diagrams with ultralow BER contours in just a few seconds, enabling very rapid and complete 'what if' design space exploration."

At today's multigigabit-per-second rates, high-frequency phenomena like impedance mismatch, reflections, crosstalk, skin effect, and dielectric loss come into play. Agilent's Channel Simulator allows designers to perform simulations using circuit-level models that can be verified against measured data and EM simulation of the layout artwork.

"While we've used the sophisticated Transient Simulator for some time to calculate an accurate step response from distributed elements, combining it with the Channel Simulator's new statistical mode provides us with an even more powerful solution," said Chad Morgan, principal engineer at Tyco Electronics. "We use it for noise calculations, jitter injection and equalization optimization. Having all of these capabilities in one easy-to-use environment is exciting and allows us to quickly and easily analyze channels and push them to new speeds."

Other signal integrity enhancements featured in Agilent's Advanced Design System (ADS) 2009 Update 1 include a BER contour and bathtub display, equalizer support with automatic tap optimization, an eye mask utility with automatic violation checking, the ability to check cross-talk with aggressors at different data rates
a memory bus compliance tool for the DDR3 standard, emitter-coupled logic models that comply with the IBIS standard, and a time-domain reflectometry tool.
 
The Agilent ADS 2009 Update 1 will be available this month. Base price for the new Channel Simulator mode is $28,000.

www.agilent.com/find/signal-integrity