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Turbo-product codes advance ECC technology
Higher performance ECC gives you more flexibility in defining your communication-system architecture, and turbo codes offer you improvements over older ECC algorithms.
Dave Williams, Advanced Hardware Architectures -- EDN, 2/3/2000
Communication-system designers have always had to deal with trade-offs among data reliability, efficient use of available spectrum, data throughput, and cost. Error-correction coding (ECC) is one of the most powerful tools available to address these trade-offs, and better ECC yields more design options. For example, with 3 dB of coding gain you could increase range by 40%, reduce antenna size by 30%, reduce transmitter power by a factor of two, reduce the required noise figure of the receiver by 3 dB. Alternatively, you could use a higher order modulation scheme, which can reduce the required bandwidth by 50% or increase data throughput by a factor of two.
Turbo-product codes build on existing algorithms
Parallel, concatenated, convolutional turbo codes promised an exciting breakthrough in error-correction-coding technology but still had problems (see sidebar "ECC goes turbo"). The first problem was that more extensive computer simulation of the codes exposed a weakness in these codes. The performance of the codes at bit-error rates (BERs) of 10–5 or greater was within 1 dB of capacity; however, the performance tailed off, or met an "error floor," at low BERs, such that legacy codes, such as Reed-Solomon, were still superior. The second problem was that the complexity of the required soft-input, soft-output (SISO) decoder was such that a cost-efficient decoder was unavailable for most commercial applications.
In 1998, a new approach to turbo codes solved both of these problems. Using an extremely efficient SISO-decoder algorithm, which Efficient Channel Coding Inc (www.eccincorp.com) developed, Advanced Hardware Architectures Inc (AHA) introduced the first commercially viable turbo decoder based on the iterative decoding of product codes, rather than the convolutional codes. Ironically, product codes had been discussed nearly 40 years earlier .
In the general sense, turbo-product, or block-turbo, codes are composed of a multidimensional array of block codes, such as Hamming and BCH (Bose, Chaudhuri, Hocquenghem) codes. In their simplest implementation, the constituent codes can consist of parity codes alone. Figure 1 shows an example of an 8,4´8,4 product code. The constituent codes in this case are extended Hamming codes, consisting of a 7,4 Hamming code with an additional parity bit appended. The algorithm performs encoding row by row and then column by column or vice versa. As a result, the completed array also consists of ECC bits calculated from other ECC bits.
The D in the array represents data bits, and the E represents ECC bits. You can apply the same concept to three or more dimensions. To keep decoder complexity low, AHA uses both extended-Hamming and parity-constituent codes in its turbo-product-code (TPC) ICs.
Performance comparisons tell the tale
You can see the performance of turbo product codes by plotting BER versus normalized SNR (EB /NO ) (Figure 2). The comparisons show TPC performance, a Viterbi-decoded convolutional code, and Reed-Solomon concatenated with a Viterbi-decoded convolutional code (RSV). The code rates were approximately equal for this comparison, and these curves were all generated assuming an additive white Gaussian noise (AWGN) channel.
The figure also illustrates three important advantages that ECC in general and TPCs in particular provide communication-system designers:
- Designers can use the coding gain to improve the reliability of the communication system by reducing the BER or by providing additional headroom, or "link margin," to the design.
- Conversely, they can use the coding gain to reduce the required transmitter power; reduce the size of the transmitting antenna, the receiving antenna, or both; or reduce the implementation-loss requirements of the modem. All of these factors translate into reduced system cost.
- Designers can use the coding gain to improve the range of the system. In the case of a home wireless network, this increased range can mean the difference between you being able to reach your laptop computer poolside and you having to work inside.
Coding-gain improvements can also let you improve data rates or squeeze more data into the available spectrum (Figure 3). At BERs commonly associated with the digital-video broadcasts and using 64-QAM (quadrature-amplitude modulation), TPCs let you reduce the bandwidth requirement by a factor of 2.38 over uncoded quadrature phase-shift keying (QPSK) and still reduce the required transmitter power by about 2 dB. The trellis-coded-modulation connected with the Reed-Solomon solution reduces bandwidth as much as the TPC technique but requires nearly 2 dB more transmitter power.
ECC provides a powerful tool for the communication-system designer to improve performance, reduce system cost, or both. TPCs have an inherent flexibility that permits a designer to make trade-offs, including bandwidth efficiency, BER performance, and implementation cost.
Manufacturers can fabricate high-performance decoders with today's semiconductor technology to meet applications ranging from cost-sensitive, 10-Mbps modems to high-end applications requiring gigabits per second. You can readily combine TPCs with bandwidth-efficient modulation formats, to provide additional flexibility in designing next-generation communication systems.
| P Elias first described product codes in 1954 ( Reference 1 ). By the early 1980s, at least one paper and textbook had been published describing the advantages of the iterative decoding of product codes ( references 2 and 3 ). R Pyndiah refers to the iterative decoding of product codes as block-turbo codes ( Reference 4 ). Advanced Hardware Architectures refers to them as turbo-product codes (TPCs). In any case, TPCs, or block-turbo codes both refer to the same basic concept involving the iterative decoding of product codes. REFERENCE
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| In a general sense, you achieve error-correction coding (ECC) by adding redundancy, such as parity-check symbols, to a message before transmission. This redundancy provides the corresponding decoder at the receiver with information such that the receiver can detect and correct transmission errors. ECC has potential application whenever digital data moves over an imperfect—for example, noisy—channel, such as satellite communications systems, wireless LANs, digital cellular communications, digital-video broadcast, and others. You can also use ECC for data storage and retrieval systems, such as CD-ROMs, magnetic tape, and disk storage. Among the most powerful and common ECCs today are Reed- Solomon (RS) codes, convolutional codes, and combinations of the two. IS Reed and G Solomon developed the codes in 1960; the codes are the standard ECCs for Intelsat and for digital-video broadcasting applications. Convolutional codes are another group of powerful codes that became popular with the introduction of the Viterbi decoding algorithm. The concatenation of these two codes, Reed Solomon Viterbi (RSV), has for many years represented the state of the art in ECC. In 1993, French researchers described coding technology based on the iterative decoding of parallel-concatenated convolutional codes. They called this technology "turbo codes," analogous to a turbocharged engine. Unlike single-pass decoding with a hard-decision output that other error-correction technologies use, turbo decoding uses a soft-input, soft-output (SISO) decoder that retains confidence information that feeds back into the input of the decoder ( Figure A ). Each pass of data through the decoder improves the quality of error correction. The iterative decoding of turbo codes is like the process you use to solve a crossword puzzle. The first pass through a crossword puzzle is likely to have a few errors. Some words seem to fit, but when the letters intersecting a row and column don't match, you go back and correct your first-pass answers. Similarly, the turbo decoder iteratively decodes until it converges on the best answer. ECCs have a theoretical limit to their ability to correct a corrupted data stream. The Shannon limit defines the optimum theoretical boundary for any code and at a given code rate. Although many people think of the Shannon limit as an SNR (EB /NO ) of –1.6 dB, the capacity limit depends on the code rate of a given code. Code rate is the ratio of information data bits to the sum of information data bits plus the error-correction bits added to the data stream, as follows: Code rate=number of data bits/(number of data bits+number of ECC bits).< /FONT> For example, a code that takes 8 data bits and adds 2 error-correction bits has a code rate of 0.8. The key performance measurement of any ECC is how close it gets to its associated theoretical Shannon limit ( Figure B ). |
Author Information
Dave Williams is the product marketing manager for communication products at Advanced Hardware Architectures Inc ( www.aha.com). Previously, he worked as a senior staff engineer with L-3 Communications. You can reach him at davew@aha.com or 1-509-334-1000.
REFERENCE
- Specification, "AHA4501 36 Mbits/sec Turbo Product Code Encoder/Decoder," November 1998.2. Hewitt, E, "Turbo Product Codes for LMDS,"
IEEE Radio and Wireless Conference , August 1999.
