Between The Lines

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Recent Posts

• DesignCon 2008: One step forward, two steps….
• EDAC CEO Forecast: 2% growth for EDA revenue in 2008? EDA blues or blue skies ahead?
• My IC reliability cover story and my upcoming DesignCon DFM panel
• Brave, Brave, Brave Sir Robin…Saxby
• Calypto RTL to ESL equivalence checker gets vote of confidence
• "Let the mayhem begin!": Open Verification Methodology available for free download
• Congratulations on the Xilinx CEO gig, Moshe!
• 2007: the year of EDA isolationism
• EyeClops and IlluStory: more educational Holiday gifts for kids
• Living dangerously in EDA: microphone, you, Davidmann

Recent Comments

• London escorts on Xbox, Zombies, Lego, PC Boards and better mouse traps: educational high tech toys for Christmas
• The Real Deal on Cadence/EDA vet Eric Filseth takes over Ciranova: idealistic or insane (or both)?
• CitoupCithelp on Another Grim Day for EDA: Richard Goering laid off from EE Times--CMP layoffs
• CitoupCithelp on Another Grim Day for EDA: Richard Goering laid off from EE Times--CMP layoffs
• Steave on I’m no one trick pony!

Most Commented On

• How long should a TV last? (50)
• "How long should a TV last" and my new “Electronics Products Obituary” (26)
• EDA’s ESL vendors--Unite and take over!...or at least get organized (18)
• Grim day for EDA—Gartner closes down EDA analysts group (16)
• Another Grim Day for EDA: Richard Goering laid off from EE Times--CMP layoffs (12)

Archives

• February 2008
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By Category

• Analog (12)
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• Configurable Processor (1)
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• Programmable Logic (19)
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• Research (1)
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• Show Daily Report (3)
• Signal Integrity (1)
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• Venture Capital & IPOs (4)
• Verification (9)
• Verification (3)
• Vertical Markets (1)

IC Design Articles

• Boeing postpones test flights again: How’s your tapeout looking?
• Reference-tool flows and process-design kits, part two
• Team hardens SiGe circuits
• Digital photomultipliers challenge vacuum-tube photomultipliers
• EDN on IC Design: Expanding approaches to networks on chip
• More...

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