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Recent Posts

• Memcon panel explores low-power main-memory choices
• Altera spins Cyclone with low-power, design protection, and redundancy
• Mentor upgrades Catapult-C to deal with control logic and power management
• LSI brings LDPC technology to disk read-channels
• Solido adds well-proximity estimation to Variation Designer
• Calypto works with Virage on managing memory power
• Cypress, SpectraLinear go almost head-to-head on clock ICs
• CPU power management, systems architecture and market share: a not-so-subtle interaction
• Intel's Mayberry sketches in the roadmap for Intel process evolution
• Toshiba, TSMC show different directions at VLSI Symposium

Recent Comments

• sebastina mont on The Tata People's Car may come to North America
• Old_Engineer on Silicon Frontline: taking on the emerging challenges in extraction
• Siddharth Rao on Cypress, SpectraLinear go almost head-to-head on clock ICs
• basic optics on Heard at SemiCon West: what lies beyond double-patterning lithography: EUV, e-beam, imprint technology, or the end of history?
• realized on Intel's Mayberry sketches in the roadmap for Intel process evolution

Most Commented On

• India's $20 laptop plan challenges our thinking about system design (60)
• Why the layoffs if we're still profitable? (39)
• The Tata People's Car may come to North America (36)
• Heard at Hot Chips: As design outsourcing matures, a potential problem is emerging (33)
• The Tata People’s Car and the promise of automotive electronics (24)

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