EDN Executive Editor Ron Wilson explores how IC design teams really work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?
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Recent Posts
- Semiconductors, emerging markets, and the self-interest of survival
- Femtocell reference design from picoChip heralds new phase in wireless buildout
- Data centers, shipping containers, and the future of access networks
- Arteris expands their approach to Networks on Chips
- Intel's Borkar hints at future of SoC architecture and semiconductor test
- ITC panel highlights pioneering work of Stanford Center for Reliable Computing
- Altera Cyclone IV parts signal direction of the global-recession industry
- Gennum offers a study in leading-edge mixed-signal design
- PMC-Sierra takes aim at carrier Ethernet with a new OTN chip
- IDT starts to line up products behind Serial RapidIO Gen2
Recent Comments
- Dietroly on Getting a grip on cloud computing: NVIDIA, the Playstation-3, and big iron
- Rajesh Durkhure on Virage absorbs a key piece of NXP: signs for the future of IP?
- garydpdx on Arteris expands their approach to Networks on Chips
- garydpdx on Can IP-XACT really do automated IP assembly?
- EDA Person on Synopsys introduces Matlab-to-RTL synthesis path for datapaths
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- India's $20 laptop plan challenges our thinking about system design (66)
- A solar-panel glut could be a golden opportunity (48)
- Why the layoffs if we're still profitable? (43)
- The Tata People's Car may come to North America (36)
- Heard at Hot Chips: As design outsourcing matures, a potential problem is emerging (33)
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December 2007
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