EDN Executive Editor Ron Wilson explores how IC design teams really work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?
Advertisement
Profile
Recent Posts
- Semiconductors, emerging markets, and the self-interest of survival
- Femtocell reference design from picoChip heralds new phase in wireless buildout
- Data centers, shipping containers, and the future of access networks
- Arteris expands their approach to Networks on Chips
- Intel's Borkar hints at future of SoC architecture and semiconductor test
- ITC panel highlights pioneering work of Stanford Center for Reliable Computing
- Altera Cyclone IV parts signal direction of the global-recession industry
- Gennum offers a study in leading-edge mixed-signal design
- PMC-Sierra takes aim at carrier Ethernet with a new OTN chip
- IDT starts to line up products behind Serial RapidIO Gen2
Recent Comments
- Dietroly on Getting a grip on cloud computing: NVIDIA, the Playstation-3, and big iron
- Rajesh Durkhure on Virage absorbs a key piece of NXP: signs for the future of IP?
- garydpdx on Arteris expands their approach to Networks on Chips
- garydpdx on Can IP-XACT really do automated IP assembly?
- EDA Person on Synopsys introduces Matlab-to-RTL synthesis path for datapaths
Most Commented On
- India's $20 laptop plan challenges our thinking about system design (66)
- A solar-panel glut could be a golden opportunity (48)
- Why the layoffs if we're still profitable? (43)
- The Tata People's Car may come to North America (36)
- Heard at Hot Chips: As design outsourcing matures, a potential problem is emerging (33)
Archives
- November 2009
- October 2009
- September 2009
- August 2009
- July 2009
- June 2009
- May 2009
- April 2009
- March 2009
- February 2009
- January 2009
- December 2008
- November 2008
- October 2008
- September 2008
- August 2008
- July 2008
- June 2008
- May 2008
- April 2008
- March 2008
- February 2008
- January 2008
- December 2007
- November 2007
- October 2007
- September 2007
- August 2007
- July 2007
- June 2007
- May 2007
- April 2007
- March 2007
- February 2007
- January 2007
- December 2006
- November 2006
- October 2006
- September 2006
By Category
- 3G (3)
- Analog (14)
- Asia (2)
- ASICs (10)
- ASICs (10)
- ATE (6)
- Automatic test equipment (ATE) (1)
- Automotive (1)
- Automotive & Aerospace Test (1)
- Best practices (1)
- Bluetooth (2)
- Broadband (1)
- Broadband (8)
- Business and Marketing (54)
- Capital Equipment (8)
- China (1)
- Code development & Debugging (1)
- Communication functions (6)
- Compiler (1)
- Components, Hardware, Interconnect (3)
- Compression Algorithms (1)
- Computers, boards, buses (2)
- Configurable Processor (1)
- Connected Home (2)
- Connecting Technologies (1)
- Consumer Electronics (5)
- Convergence (5)
- Converters (5)
- DAC (1)
- DAC (1)
- Debugging (1)
- Defense (1)
- Design (1)
- Design and Technology (13)
- Design for Test/Built-in Self-Test (1)
- Design Strategies (17)
- Digital ICs (18)
- DSP (1)
- DSP (8)
- Economics (5)
- EDA (81)
- Electronics Licensing & Technology Agreements (1)
- Embedded Systems (4)
- Emerging Technologies (1)
- Environmental Compliance (1)
- Etching (1)
- Executive Changes (1)
- Failure Analysis (1)
- Fiber-optic (1)
- Fibre Optics (5)
- Filter (1)
- Finance (3)
- Flip Chip Technology (5)
- Global (8)
- Global Supply and Trade (1)
- Globalization (2)
- Government/Legal (8)
- HDL (1)
- Home Gateway (1)
- Home Network (1)
- Image Processing (1)
- India (1)
- Inspection, Measurement and Test (1)
- Interface and level conversion (1)
- IP (1)
- IP (27)
- Joint Ventures (1)
- LAN (1)
- Languages (1)
- LANs (2)
- Licensing & Technology Agreements (6)
- Lithography (14)
- Low-k (1)
- Management (2)
- Manufacturing Operations (7)
- Marketing (1)
- Materials Science (1)
- Memory components (16)
- Mergers and Acquisitions (6)
- Microcontroller (1)
- Microcontrollers (2)
- Microelectronics and Packaging (5)
- Microprocessor (1)
- Microprocessors (9)
- Microscopy (1)
- Mobile (10)
- Music/Audio (1)
- Network processors (2)
- Outsourcing (3)
- Packaging (2)
- Phase-Locked Loop (1)
- Physical-layer interface (1)
- Politics & Policy (1)
- Power Sources/Controllers (5)
- Processors (11)
- Processors & Tools (4)
- Programmable Analog (1)
- Programmable Logic (23)
- Reconfigurable and reuse (1)
- Regional Markets (1)
- Regulatory Issues (1)
- Research (7)
- RF (7)
- Security (1)
- Semiconductor Test (2)
- Semiconductors (65)
- Set-top Box (1)
- Signal Chain (1)
- Signal Integrity (4)
- Silicon (5)
- Simulation (7)
- SOC (1)
- SOC (2)
- SOC (7)
- SOC (System on a chip) (205)
- Software (9)
- Software Development Tools (3)
- Spice (1)
- Standard busses (5)
- Standards (1)
- Standards (3)
- Storage devices (4)
- Structured ASICs (5)
- Synthesis (1)
- System-level Design Language (6)
- Systems on Chip (5)
- Test Bench (3)
- Thermal Management (1)
- Venture Capital & IPOs (1)
- Verification (17)
- Vertical Markets (1)
- Video (3)
- Video/DTV (9)
- Wafer Processing (1)
- WiMax (1)
- Wire Bond (3)
- Wired (5)
- Wireless (16)
- Yield Management (1)
May 2008
Wednesday, May 28, 2008
Tuesday, May 27, 2008
Tuesday, May 20, 2008
Monday, May 19, 2008
Thursday, May 15, 2008
Tuesday, May 6, 2008
Monday, May 5, 2008
Thursday, May 1, 2008
ADVERTISEMENT
About Us | Contact Us | Free Email Newsletters | Free Magazine Subscription | Advertising | 
RSS
©1997-2009 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy