Practical Chip Design

This week, the principle players in the effort to make direct-write electron-beam lithography a practical near-term alternative for prototyping and limited production of ICs took another step closer to realizing the dream. The inner circle of companies, including Fujitsu, its e-beam prototyping subsidiary eShuttle, library and tool developer D2S, and equipment providers Advantest and Vistec, announced formation of the eBeam Initiative: a 20-company effort to promote e-beam lithography as a near-term alternative to mask-based fabrication of prototypes and small production runs. The group of companies includes interested parties from chip design houses and EDA firms through equipment providers and wafer foundries.

The timing would seem to be perfect. Direct-write e-beam lithography promises to entirely eliminate mask-making from the flow for conventionally-designed and processed ICs in low to moderate volumes and advanced processes. By writing patterns directly on the resist-coated wafer without the need of masks, the process eliminates the time and cost of mask manufacturing, taking potentially millions of dollars and weeks of delay out of the picture. This, advocates claim, would put prototypes of advanced 65, 45, and 32 nm chips within reach of venture-funded companies without outside subsidies, and would make low- to moderate-volume production of advanced ICs financially feasible.

With the announcement of the Initiative, spokespeople for some of the member companies offered status reports illustrating that the pieces of the e-beam puzzle are falling into place. Character-based e-beam lithography systems—essentially the same type of systems used in mask-making—are available today, and are in fact in the fabs and running at Fujitsu and French research institute CEA/LETI. Fujitsu has reported using the systems to pattern all the metal layers on a 65 nm chip design. And at SPIE, LETI team leader Serdar Manakli reported on successful patterning of a 32 nm contact layer, the most critical layer in the 32 nm process.

So when can design teams start taping out for the new process? Not just yet. Fujitsu has not disclosed a schedule for full 65 nm production, and probably will not until they can demonstrate patterning of all layers, including the critical bulk-silicon and poly patterns. LETI is not intending to be in the commercial business, but expects to demonstrate a full 32 nm chip later this year, and is reportedly working with other foundries on both 32 nm and 45 nm commercial services.

The biggest barrier that remains between both of these efforts and commercial production, according to Aki Fujimura, CEO of D2S, is throughput of the e-beam system. All parties seem to agree that they will need to get one wafer per hour through the system for e-beam direct write to be viable in this context. Clearly this is not a solution for DRAM or microprocessor production—don't confuse it with the multi-beam e-beam developments that are still far in the future. The 1 w/h target is to make prototyping and small quantities of wafers commercially viable.

To get there, it is not the e-beam equipment that has to change, Fujimura says, but the design data. Character-based e-beam systems work by pulsing an electron beam through a template with a shape cut out of it. The shape is called a character, and printing one character onto the resist is called a shot. So throughput of the printer is a function of the number of shots required to form all the patterns on a layer for the whole wafer.

That number is determined by how you select the patterns. The naive way of doing it would be much like the algorithms used in dictionary-based data compression. You scan the layer, identify all the unique patterns, and extract the most frequently-occurring shapes. Then you optimize the number of shapes against the number of shots required for the layer. The shapes you end up with become your characters.

As it turns out, according to Manakli, this approach won't reduce the shot count enough to get you to the magic 1 w/h. Instead, you need a more thorough-going methodology. And that is what D2S is doing. The company's design-for-e-beam methodology first creates a new version of an existing cell library in which the cells have been composed using a carefully-chosen character set to minimize the number of shots per cell. Then during synthesis, the synthesis tool gets an additional cost function that encourages it to minimize the shot-count of the netlist it is creating. These changes do not impact the conventional tool flow either in choice of tools or in methodology, Fujimura emphasized. The additional constraints on cell design and synthesis do end up costing about a 5 percent overhead in die area, however. But this approach appears to reduce the shot count on most designs sufficiently to break through the 1 w/h barrier.

There are additional issues to be resolved. Existing resist formulas are optimized for 193 nm light, not electrons, and so are not ideally sensitive to the e-beam. More sensitive resist—which some suppliers reportedly are working on—could also improve throughput. And there are detailed sources of distortion, from Coulombic effects and from scattering, that limit resolution. There are also complex focus issues, according to Advantest department manager Akio Yamada, because the beam current varies with the choice of character being printed. But these issues can all be controlled, either with the variable-focus provisions in the printer or with preprocessing not unlike the OPC done for optical lithography. There is plenty of work to keep all the partners in the new initiative busy during 2009.

In a way, that timing is unfortunate. The promise of direct e-beam lithography would be perfect for the economic problems of today. Companies are severely cash-constrained, and very unsure of the end-markets they are serving. It would be great to get into production on a new design without mask charges and with a very modest initial production run for minimal investment.

At the Initiative announcement Jack Harding, chairman and CEO of eSilicon, underlined the importance of the initiative. "I have grave concerns about the innovation engine that has driven the semiconductor industry," Harding said. He pointed out that much of the innovation comes from companies with fewer than 50 employees. But those companies today are often priced out of access to advanced processes. "We must make getting to market easier for companies with good ideas," Harding concluded. "That makes e-beam a valuable alternative."