Practical Chip Design

Researchers at NEC today described a novel approach to reducing the energy consumption of SoCs that spend a significant portion of their time in standby mode. Applying the magnetic tunnel junction structure the company developed for its magnetic RAM (MRAM) devices, NEC researchers have created a non-volatile flipflop that you can drop into your standard cell library as an alternative to the standard flops. The cell appears functionally equivalent to the standard flops when power is on, delivering the same 3.5 GHz toggle frequency as the standard flops in the process NEC used for the experiment, and operating on the same 1.2 V supply. But when power goes down, the cell saves its state in the bistable magnetic junction, restoring state when power returns.

This ability would allow you to power-down blocks without having to explicitly save the state of the registers and state machines to an external non-volatile memory, and to restore power without having to restore the state. From the press release, it appears that the magnetic junction is fast enough either to track the flipflop in real time or to copy the flipflop state as power is going down. But the actual timing of the cell is not entirely clear from the release. Nor is it clear how much external control is necessary to accomplish the save and restore actions.

Either way, one presumes that the logic designer would still be responsible for isolating the block before power drops too close to the threshold voltage to avoid spurious transitions in the random logic, and to manage the power-up sequence for the same reason. Saving the state of the flops isn't the same thing as freezing the state of all the nodes. But still, it appears that use of this cell would considerably simplify the use of power gating, as well as making power-gating practical at much finer granularity and for shorter periods of time.

NEC engineers pointed out that the innovation depends on the characteristics of their magnetic memory technology: compatibility with CMOS processes and operating voltages, high speed, and essentially infinite write endurance. Ferro-electric RAM, for example, requires a much higher voltage for programming and has quite limited write endurance, both of which would make a cell-level non-volatile flipflop impractical.