Ron WilsonEDN Executive Editor Ron Wilson explores how IC design teams really work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?


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Friday, July 18, 2008

Heard at SemiCon West: 300 mm or 450 mm wafers—what do the models tell us?

Jul 18 2008 3:36PM | Permalink | Email this | Comments (0) |
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In a panel discussion Thursday morning, representatives of a SEMI study group presented a strong case against an early move to 450 mm wafers. Their arguments were quantitative, based on an economic model jointly developed with ISMI. So far, so good.

But one of the key assumptions in SEMI's analysis was to treat the entire industry as a single entity—as if we were all one big IDM. That allowed the analysts to feed industry-average figures into the key parameters in the economic model: averages for volume, demand growth, costs, equipment performance, and the other variables involved. The results, as we have noted elsewhere, were firmly that now is not a feasible time to attempt development of 450 mm wafer infrastructure.

But members of the panel noted that the driving force behind 450 mm comes from just three organizations: Intel, Samsung, and TSMC. So here's a speculation: what if both sides are correct? What would happen if SEMI took the same economic model and ran it twice: once for companies such as the giant three—there wouldn't be many more than three—and once for the rest of the industry without the giants?

I have no doubt that the analysis for the industry without its largest manufacturers would come to the same result as the one SEMI declared: that 450 makes no sense today. The answer should be overwhelming. But what would the answer be for that elite of very large companies?

Many of the input variables could be quite different. Certainly volumes would be. Also, the need to get increased die capacity out of planned wafer capacity would probably be much greater here. The industry as a whole may have enough capacity lying around, and slow enough demand growth, that it can bet on increased die output simply through yield improvements and migration of designs to advanced processes. But Intel, Samsung, and TSMC may not. Many of their key products—MPUs, NAND chips, FPGAs—are large dice that aren't getting smaller with succeeding process generations: instead, they are getting more complex. Even staying ahead of the ITRS Roadmap, they may be facing sobering choices of either building more $6 billion fabs or getting significantly more dice per wafer.

Additionally, if the manufacturing industry is consolidating, as many people say, the largest manufacturers should be planning for demand growth above the industry average, as hapless smaller competitors are driven out and designs are concentrated in the largest fabs.

Finally, these giants have significantly different work profiles than smaller competitors. They tend to have very long, stable runs of high-volume products, rather than many smaller runs punctuated by retooling or retuning. This is even true of foundry TSMC, given the volumes demanded by their largest customers. And these companies, with their lead on the industry in process controls, factory management, and the ability to track and control at the wafer level, have far better weapons than the average fab for actually getting the theoretical maximum throughput out of a machine, even with mixed workloads.

So what if the economic analysis comes out in favor of a rapid migration to 450 mm for Intel, Samsung, TSMC, and maybe a couple of others, and strongly in favor of 300 mm for everyone else? Then what?

We already know from the experience in the 200 to 300 mm transition that quickly R/D will evaporate for the older equipment working on the smaller wafers. It's not a question of there not being good ROI for the 300 mm equipment any more, it's a question of simply not having the R/D resources to upgrade two product lines at once, one for the "big" industry and one for everyone else.

So a gap between the 450 mm haves and the 300 mm have-nots would quickly evolve into a gap between the advanced-process haves and the stuck-at-35-nm have-nots. Such a situation would rapidly turn semiconductor manufacturing into an oligarchy of a few giants, a few boutiques doing really unusual specialty processes, and no one else. The smaller companies would be forced to consolidate until they could make the economic model work for 450 mm equipment of their own. Or they would be forced to become, in effect, consolidators.

But could a handful of semiconductor giants actually fund the development of the 450 mm infrastructure without the rest of the industry participating? That is a question with many variables, including the depth of the current global economic crisis, and the willingness of certain governments and sovereign wealth funds to write checks for their prize semiconductor companies. The only sure thing is that this time, unlike the sucker-punch at 300 mm, the equipment industry is not in a position to fund the venture themselves.


Related entries in: Capital Equipment | Semiconductors | 


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