Practical Chip Design

An evening panel session at the International Test Conference this evening reviewed decades of the research work at Stanford University's Center for Reliable Computing, and nearly turned into an encomium for one man: the Center's director, Ed McCluskey. By offering statements from many CRC members past and present, the panel showed the remarkable range of technology vital to the industry in which CRC—and McCluskey—have played a seminal role.

In the early days, according to the first panelists--including Dan Siewiorek, who spoke by pre-recorded video--the center stayed close to the implications of its name, doing original work on such topics as fault-tolerant computing circuits, triple module redundancy, voting algorithms, and estimation of system reliability. But as integration increased and computers became chips, the center's work naturally expanded into the related area of semiconductor testability.

It is in this connection that the work of CRC has its greatest significance for ITC attendees. For in pioneering work on how to test digital circuits, the center's members wrote widely-cited papers on such vital topics as how to reorganize a logic network to best analyze the possible fault conditions, how to study transient failures in combinatorial networks, how to optimize logic synthesis algorithms for testability, and fundamentals of built-in self-test (BIST) architecture and synthesis.

One particular program started by CRC and continued over 18 years, spanning process generations from 0.7 to 0.13 micron, and devices from 25K-gate gate arrays to an Nvidia graphics engine, is a long-term study of test and reliability data. In addition to accumulating a huge amount of historical data, the program gave birth to such ideas as very-low-voltage test as an alternative to burn-in test, N-detect test patterns, and ways to propagate errors to outputs. "This one program changed the way people test chips," said panelist James Li.

Phil Nigh of IBM Microelectronics agreed with Li both on the role of CRC in launching these concepts and on their fundamental importance to test technology, as much now as when the ideas were hatched. In addition to the points cited by Li, Nigh said that it was CRC that published some of the early work demonstrating that most faults in fact don't behave like a theoretical stuck-at fault, and that the industry's primary fault model was broken.

"People in industry were out there using some of these techniques, but they wouldn't talk about them," Nigh said. "Stanford was the place that launched a public discussion on these techniques so they could become industry tools."

The panel presented a good solid argument that one long-running program at Stanford, intended originally to explore fault-tolerant computing mostly for DARPA, has been a profound source of technology—and just as important, engineer-to-engineer conversation—on some of the most challenging problems in test today. It's quite a record.