Ron WilsonEDN Executive Editor Ron Wilson explores how IC design teams really work: the struggle for power efficiency and performance, wrestling with semiconductor processes and design methodologies, the challenges of global design teams. How do we somehow herd architecture, IP, design and verification into a successful tape-out?



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Thursday, September 7, 2006

What Intel’s layoff means for chip design

Sep 7 2006 5:07PM | Permalink |Email this|Comments (3) |


By now, just about everyone has had their say on Intel’s decision to part with about ten per cent of its workforce. In case you missed it, try http://www.edn.com/article/CA6368854.html?ref=nbra for example. Opinion so far seems to be along the lines either of “serves them right, the arrogant …” or “it’s about time they adjusted to the modern world.” The common themes seem to be hubris, perhaps a bit of vengeance, and some notion that shareholders are finally going to get their value again. But now that the clamor is settling down a bit, maybe it’s time to ask if Intel’s contraction has any meaning for chip designers in other parts of the industry.

The answer to that question might lie in Intel’s underlying business strategy. Implicit in the Intel formula—not explicit, because you don’t go around saying things like this to shareholders these days—is the assumption that enormous expenditures in R/D will translate into earnings growth. The formula goes something like: enormous R/D expense creates faster processes, faster circuits and better architectures, which in turn allow faster computers, which allow users to see a valued difference in speed. So we get market share and margins in a growing market, which in turn allow us to have earnings growth.

The underlying problem at Intel is that this model only worked for a while. Today the links are broken. Beyond 90nm, it is not clear that any amount of R/D will result in significant improvements in either inherent process speed or circuit performance. Chip-level architecture can waste performance, but it can’t do much to enhance it. All the knobs are all the way over into the sector marked “diminishing returns.”

But it isn’t just engineering issues. The only thing that has created a market for ever-faster CPUs in the first place has been Microsoft’s seemingly boundless ability to absorb ever more CPU cycles to do the same job. With no new operating system or Office package in some time, that trick has let Intel down. A significant gain in CPU performance today will only be visible to a minority of users working with particularly compute-bound programs that happen not to have severe I/O limitations. The only differentiation based on CPU performance that matters much is, tragically, the clock frequency printed on the box—one of the figures Intel is increasingly powerless to drive up.

This combination of realities has meant less and less differentiation in a maturing market, which means very bad news for earnings growth. As all of us in the rest of the world learned a long time ago, when differentiation fails, the way to grow earnings is to cut expenses.

And that is where Intel’s experience is useful to the rest of us. Intel isn’t a leading indicator of trouble. It’s more of a giant canary in the mineshaft, if you will—perhaps a lagging indicator because of its sheer momentum.

The rest of the chip design world is also living with these realities. Process, implementation and architecture have less and less ability to differentiate a product today, all across the industry. The skills we were taught to hone and respect have about as much leverage on company performance as the skill of a carpenter has on the earnings of a construction company.

Intoday’s world, processes at similar nodes are pretty much interchangeable, in terms of their impact on the end product. Even hot analog or RF processes have close competitors. Circuit designs that can be done here can be done in a dozen, or a hundred shops around the world. Architectural choices are in most respects a don’t-care—they simply won’t be reflected in anything visible to the end user at purchase decision time.

So do chip designers matter? Absolutely, but for very different reasons than a few years ago. Chip design matters because it still has a lever over system cost and time to market, both of which are major influencers in earnings for both the chip vendor and its customers. And chip design matters when choosing a flexible approach over an easier alternative can expand the available market for a device, or extend its product life.

That is, I think, the real lesson from the Intel story. It’s not that the industry can’t afford engineers any more. It’s that expenditure on engineering talent has to pay back in cost, time to market, and flexibility of the resulting hardware/software platform designs. Forget increased performance or superior architectural elegance. Intel may be simply throwing away expenses, or they may be redirecting their engineering investment. But it behooves the rest of us to stop and think about what value we are really bringing to the table. It’s not about a glorious past when the microprocessor was young and the SoC an implausible dream. It’s about getting quickly, reliably to market and staying there with the least expenditure. That change has to work its way into strategy, architecture, and day-to-day design choices.


Related entries in: Business and Marketing | Digital ICs | Semiconductors | 


Reader Comments



at 3/27/2007 2:08:28 PM, Charles Potter said:
Could it be that Intel's RIF is the result of outsourcing to the GLOB-ALL world?



at 3/27/2007 2:08:37 PM, Charles Potter said:
Could it be that Intel's RIF is the result of outsourcing to the GLOB-ALL world?



at 2/26/2009 7:11:33 PM, Anonymous said:
TI has started layoff in India as well, though they don’t call it layoff. Employees are laid off quitely with ZERO severance. Do you want to work for such un-ethical company??

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