Nov 21 2008 11:04AM | Permalink |Comments (0) |
Unique I/O requirements are often difficult to incorporate into a COTS-based design. Many times designers are forced to modify an existing module or create an additional board just to support the non-standard I/O. Stephen Cunha of MEN Micro offers a possible solution to the I/O problem in his new EDN article entitled “Universal submodule concept cuts I/O design costs, time-to-market”. The concept integrates a FPGA-based submodule onto a standard mezzanine card format to allow system designers to reconfigure I/O functionality. According to Stephen, “These FPGAs can be formatted with existing intellectual property (IP) cores to create discrete capabilities such as a CAN controller, Ethernet controller, Binary I/O controller, PCI to Wishbone interface, Flash interface, UARTs, pulse width modulation, frequency counters or dozens of other functions. Such IP cores are available on the open market (e.g. www.opencores.org) as well as from board and component suppliers.”
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