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Blog
Tuesday, July 1, 2008
Read pacing boosts PCI Express performance
Jul 1 2008 3:55PM | Permalink |Email this|Comments (5) |
One of the potential problems with PCI Express embedded designs containing multiple high speed data streams is known as endpoint starvation. This can occur when a downstream device requests sequential long reads and the Root Complex spends too much time in serving these requests. The result is that other downstream ports are ignored and therefore starved for data. The latest generation of PCI Express switches offer a read pacing feature to throttle the bandwidth allocated to each downstream device to eliminate endpoint starvation and enhance system performance. PLX Technology has prepared a video for EDN Tech Clips section to walk you through the benefits of read pacing and give you the implementation details that you need for your next PCI Express design. You can click on the small image on the left to view the video.
Related entries in: Computers, boards, buses | Embedded Systems |
Reader Comments
at 7/2/2008 4:36:45 PM, occasional reader said:
You got be kidding. I can't believe that PLX is calling this a feature, or, even worse, a new feature. Every RC has this "feature" since the dinasaur period.
at 7/9/2008 2:07:37 PM, Ztech said:
I am not sure if this a new feature or not but we ran into severe congestion issues w/ poorly balanced interconnect esp with PCIE hierarchies. I still would commend them for thinking outside to box to solve a system issue.
at 7/9/2008 8:45:29 PM, Sachin said:
Why did they have to use a PCIe exerciser to demonstrate the benefit? If this is anything more that FUD, then why not demonstrate the performance benefit with two real endpoints?
at 7/10/2008 10:13:09 AM, Little Stevie said:
The read pacing makes a big difference in a notebook-based video capture system I'm developing. (Gen1 x1) I have a streaming HD video on one endpoint of a PLX switch and and a video camera stream on the other endpoint. The HD video hogs the RC bandwidth and the camera feed has artifacts, until the read pacing is enabled, at which point the camera feed becomes clear.
at 8/11/2008 7:36:18 PM, jeff said:
How is this a feature? This sounds like PLX is fixing a bug in their switch''s scheduler for inserting read requests into the upstream port. The scheduler assumes that the upstream PCIe switch will complete reads in-order
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