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Monday, November 24, 2008

You Can't Always Get What You Want....

Nov 24 2008 1:30PM | Permalink |Email this|Comments (0) |


Going back a few years (1969) I can recall a tune by the Stones whose chorus went :

 

“You can't always get what you want

 You can't always get what you want
 You can't always get what you want
 But if you try sometimes you just might find
You just might find
You get what you need................... “

          

While reading through the annals of rock-and-roll history I have uncovered that this song evolved after the Stones US tour in ’64. They had done a show in Excelsior MN which was not very well attended or received. After the show Jagger went to a local drug store soda fountain and ordered a cherry coke and was told that they were out of cherry syrup. "Mr. Jimmy", a local Forrest Gump like character, who was sitting beside Jagger leaned over and shared the now infamous line  "Well, you can't always get what you want “ and thus legend was born !

 

 Now you might be wondering “...exactly what does that have to do with semiconductor microelectronics in general or more specifically 3D Integration”....Well, that’s the theme that came to mind as I flew back to the East Coast after attending the RTI 3D Integration Conference last week, and I’ll explain why shortly.

 

Sr. Semi International editor Alex Braun was in attendance last week in Burlingame and was filing very accurate reports on what was going on. I know you all were paying attention because they all ended up in the top 5 stories of the week. Having said that, I still feel compelled to give you my two cents on what I saw and heard because its always good to have multiple perspectives on emerging technologies that are this large and all encompassing....and make no mistake 3D IC will soon be the new elephant on the block – the only question we all have is  when ?

  

When I look back on the conference a few major themes stand out all of which are linked to the line of Mr Jimmy “You can’t always get what you want”. Most of us came to the conference looking for signs that 3D IC was taking off – perhaps a major commercial announcement from Intel or Micron or IBM ? Perhaps an indication that the design community was finally issuing software so that 3D could be laid out in a standardized fashion ? Perhaps an indication that the industry was narrowing the process technology choices to a manageable number ? Certainly we all wanted to hear that despite what now looks like it will be a deep recession, 3D IC would not be affected, but rather would move forward, bucking current economic trends.

 

While there were no blockbuster announcements last week (what we want) we did get assurances that we are steadily, if not rapidly, moving forward and that we are not wasting our time or money chasing this technology (what we need). Although we are living in the instant gratification generation, as I have outlined before [see PFTLE “Time Isn’t on Your Side” Aug 12, 2007] new technology usually takes a decade to be commercially accepted. For those of us that are impatient, that is not a pleasant concept, but it’s true.

 

Alex did a wonderful job covering the course I gave on Monday at the Symposium in his piece “3-D Integration Lacking in Design and Test Support”,so I won’t retread that ground. The only point I want to leave you with is that we are not trying to commercialize 3D integration because it is the next evolution of wire bonded 3D stacks. We are doing this because it leads us to repartitioning of chips so we can stack functions being built by optimized processes (the opposite of SoC -  system on chip solutions) . We are doing this so we can stack disparate technologies to form completely new devices. We are doing this so that we can build smaller higher performing devices without continuing to shrink circuit size. We are doing this because ultimately it will lead to lower cost. 

 

 

Standardization

 

Several of the speakers including plenary lecturers Gurtej Sandhu of Micron and Mike Shapiro of IBM pleaded for more standardization. The IBM slide shown below clearly outlines the issues. As we have mentioned before, new technologies always bring out creativity of technologists and therefore, early on in the cycle, we have many solutions to choose from, usually way too many. That is the case for 3D IC where the process choices still seem overwhelming. History tells us that full commercialization will not occur until these myriad of choices are narrowed down by the industry. In fact, this narrowing down process will tell us that we are getting close. 

It was / is hoped that consortia like EMC-3D, Sematech and IMEC will help to narrow down the choices, but it is clear that this has not happened yet. 



Copper Vias

Another example of “you can’t always get what you want” presented itself in the reliability data shown by Mike Shapiro. Mike indicated that reliability of TSV was related to the composition, size and shape of the TSV. For IBM’s annular via structures W is significantly more reliable than Cu as shown in the figure below. The have favored annular vias because “.. the Si core results in improved mechanical reliability”.  IBM has been showing this data since 2006 (see: “A CMOS-compatible Process for Fabricating Electrical Through Vias in Silicon” P. Andry et. al., ECTC 2006, p. 831) . Mike was not able to divulge any further details as to the mechanism of what was going on with the copper via failures. 



Later, private discussions with Tezzaron CTO Bob Patti confirmed that Tezzaron had also seen Cu via failures thus prompting their move to vias first ( after FEOL) W vias, which they announced earlier in the year [ see PFTLEMore 3D IC Integration from Ft McDowell “ March 30, 2008 ]. Bob was willing to get more specific and pointed to < 10 um diameter vias with AR > 6 as being in a dangerous zone when it comes to reliability.   

Although most of us are probably “pulling” for Cu vias to be successful (what we want) this information indicating that we should be very careful with via composition, size and shape is really what we need !

Note - we now have another reason to keep the AR low in such small vias !!

 

 

 ….more updates from the RTI conference are coming later this week.

 

For all the latest in 3D IC integration stay linked to Perspectives From the Leading Edge (PFTLE)……………………………….


Related entries in: 3-D Integration | Semiconductor Packaging | Semiconductor Production & Manufacturing | Topical Taxonomy--Electronics | 


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