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Brian DipertEDN Senior Technical Editor Brian Dipert exposes, analyzes and
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Wednesday, April 27, 2005

Dual-Core Data From Anand

Apr 27 2005 12:15PM | Permalink |Comments (0) |


Whenever I need some benchmarking data and don't have the hardware (my AMD system's reportedly enroute) or time to get it myself, I feel pretty confident that I'll find the unbiased and thorough examinations I crave at AnandTech (and ExtremeTech). Anand Lal Shimpi and his team came through once again with their recently-published analysis of latest-generation AMD and Intel dual-core products, along with benchmarking of:

  • dual-core, single- and dual-CPU Opteron 875-based systems, versus a single-core dual-CPU Opteron 252 and single-core, dual- and quad-CPU Intel Xeon alternatives, and
  • an AMD dual-core Athlon 64 X2-based system versus an Intel Pentium Extreme Edition 840 (with HyperThreading support), Pentium D 840 (no HyperThreading) and high-end single-core AMD Athlon 64 CPU.

When comparing performance results, keep in mind that each core in the AMD dual-core CPUs runs at a significant clock speed deficit versus the Intel alternatives. This deficit results in lower power consumption that enables AMD's dual-core chips to drop right into most single-core-designed motherboards. And the AMD chips still generally hang right in there with their Intel competitors. Like I said yesterday, AMD's CPUs' strengths are indisputable.

AMD's desire to assure socket backwards-compatibility is understandable when you  remember that the company doesn't build its own motherboards and is dependent on third-party partners for chipset support. AMD does design its own chipsets on occasion, but only to seed the market, not for high volume production; keep in mind, too, that AMD's CPUs have integrated much of the functionality that'd be in an Intel-based system design's 'northbridge' core logic chip. The backwards-compatible strategy does force the two cores in AMD's latest CPUs to contend for access to external DRAM over a shared single memory bus, although they talk to each other over a dedicated HyperTransport link.

I suspect that at AMD's 65 nm process node, the higher transistor budget, coupled with a higher pincount next-generation package, will deliver single-die, dual independent CPU-core-plus-DRAM-controller combo chips, each communicating with its own dedicated memory array and with each other over HyperTransport. 'HyperTransport' is a key word; even as it stands, AMD's approach is still technically superior to Intel's in that in the Intel case, the front-side bus is employed not only for access to external memory and other system peripherals, but also for core-to-core communication. Beware the Tragedy of the Commons.

Intel's reportedly got a cost-slimming trick up its sleeve, though. The company's first-generation dual-core chips are in effect two single-core CPUs stuck together on one die. If one core fails testing, the die gets physically chopped in two, with the remaining good core dropped into a package that's compatible with existing single-core motherboard designs. However, the resultant chip, presumably in both HyperThreading-inclusive and –exclusive variants, will exhibit an on-chip cache deficit versus existing P4s. Celeron, anyone?


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