EDN Senior Technical Editor Brian Dipert exposes, analyzes and
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Jul 11 2008 10:15AM | Permalink |Comments (7) |
Unlike last time, it doesn't look like I'm going to get a gratis iPhone for hands-on evaluation and dissection purposes. And considering how lousy AT&T's coverage is here in Truckee, I don't think I'll be buying one...though the v2 firmware is already hacked, so I could run the unit (once the rest of it gets hacked, too) on T-Mobile...hmm...nah...
The last item on the teardown laundry list that went live earlier this morning is the 2nd-generation 3G iPhone. Apple received no shortage of criticism, when Steve Jobs revealed the unit's feature set a month back, regarding the device's seeming dearth of feature set advancements as compared to its predecessor. Granted, there was:
But the form factor of the 2nd-generation unit is nearly identical, and desirable additional features such as:
haven't (yet) appeared, although I wonder to what degree they're (except for the missing second image sensor, of course) latent in the hardware and awaiting unlock either by Apple (via future firmware upgrades) or third parties (via the SDK).
To wit, I thought I'd take a closer focus on iFixit's halfway-around-the-world first look, and compare it against my year-back technical analysis of Apple's 1st-generation device. I'm a binary kind of guy, so I'll focus most of my attention on the digital side of the equation. Maybe Paul can chime in with some analog thoughts...
Although the 2nd-generation iPhone may not seem like a significant advancement from the outside, iFixit's play-by-play makes it clear that Apple successfully tackled a fairly substantial internal redesign, both to reduce cost and to make the device easier to manufacture and service. For example:
As before, this version of the iPhone has a blended NAND-plus-NOR dual flash memory architecture. Intel has seemingly won the NOR socket again this time; I suspect that the packaged device again contains dual stacked flash memory and (P?)SRAM die. We'll need to wait for someone to de-cap the package to be sure; at that time, we'll also know what the respective memory densities are. Silicon Storage Technologies is also still in the design from a nonvolatile memory standpoint, but the specifics are curious.
Last time, SST's presence took the form of an 8 Mbit parallel-interface memory, while this time around it looks like a 4 Mbit SPI chip got the nod. I 'spect this has a lot to do with the multi-to-single PCB transition; the various ICs' functions are more intimately linked now, including common access to a unified memory map. As such, Apple was able to shadow program code in DRAM and therefore migrate to a smaller, cheaper SST memory (for which direct code execution is not possible, due to the serial interface).
Speaking of volatile memory, last time Apple combined DRAM and the Samsung-developed ARM processor (which I suspect is functionally unchanged from last-to-this time) under a common package lid, with the NAND flash memory standalone. This time, the company reversed course; the DRAM is seemingly the discrete device, per iFixit's coroner, with the ARM CPU and NAND die bundled together. This switcheroo is curious; I have a couple of theories:
Continue reading with Part Two: 'Apple's 3G iPhone: eBook Revisits And Graphics Code Development Resources'...