Brian's Brain

One of the key hinge factors in the success or failure of AMD's K10 microarchitecture, as I mentioned in last Tuesday's quad-core Opteron writeup, has to do with the rapidity and voracity of competitor Intel's product (and pricing) response, both on Intel's current 65 nm process and coming-soon 45 nm follow-on. I'm scheduled for some benchmark time with a 45 nm Penryn-based system this week at IDF (similar to the arrangement with the Core 2 Extreme QX6700 I tested a year ago), and I hope to have a motherboard and CPU of my own in-hand soon thereafter. Feel free to draw conclusions about Intel's 45 nm process and product health, and the likelihood of a rumoured mid-November formal product launch.

Even though Intel isn't yet shipping out Penryn-based hardware to reviewers, well-connected folks are already getting their hands on CPUs (usually via motherboard vendor intermediaries). As a preview of my own coverage to come later this week, therefore, check out the following links (keeping in mind that, since they're based on unofficial and likely early beta silicon, their correlation to subsequent production chips is unclear):

• AnandTech's writeup on the dual-core (single-die) Wolfdale CPU
• DailyTech's testing of the quad-core (dual-die) Yorkfield version, and
• Slashdot's discussion (which, note, predated AMD's 'Barcelona' introduction) on the latter

Keep in mind as you read the analysis that Penryn is more than just a litho shrink of today's Core microarchitecture-based (i.e. 'Core 2' marketing moniker) products. Already-announced improvements include:

• Faster front side bus speeds (rumoured to range as high as 1600 MHz for server and workstation CPU versions, versus today's 1333 MHz)
• Up to 6 Mbytes of core-shared L2 cache per die (from 4 Mbytes on 65 nm), coupled with more intelligent use of that L2 (specifically, the ability to speculatively execute across cache lines)
• 50 new SSE4 vector instructions, and a 'Super Shuffle' engine (a full-width, single-pass, 128-bit shuffle unit)
• An enhanced (up to 2x faster per operation, or said another way up to 4x faster square root operations, versus 65 nm) Radix-16 divider
• Hardware virtualization acceleration enhancements, specifically faster entry and exit instructions for 25-75% faster virtual machine transitions
• Even deeper powerdown capability, disabling both the core clock and the L1 and L2 caches (with the process state saved for recovery on subsequent wakeup), along with the ability to auto-overclock one core when the other core is not being used (in single-threaded applications, for example) in order to increase overall performance while remaining within the specified per-die thermal envelope.

Penryn is the 'tick' (derivative) first step in Intel's 45 nm process plan, reflective of the fact that it's not wise to simultaneously transition both process and microarchitecture. The follow-on 'tock' new microarchitecture to succeed Penryn will appear in products currently known only by their Nehalem project code name.