EDN Senior Technical Editor Brian Dipert exposes, analyzes and
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Apr 27 2006 5:43AM | Permalink |Comments (0) |
This blog post references my article 'Double take: Reassessing x86 CPUs in embedded-system applications' in EDN's April 27, 2006 edition.
At the Embedded Systems Conference a few weeks ago, Via announced a single-chip version of the CN700 chipset mentioned in a companion blog post in this series, called the CX700. Befitting its embedded system focus, and ensuring that it won't be I/O-bound and therefore will be cost-effective in a single-chip implementation, the CX700 strips out some of the features you'd find in a two-chip north-plus-southbridge configuration; the secondary IDE channel, for example, along with ISA bus support (a PCI-to-ISA bridge chip is available if you need this capability) and a few of the abundant USB2 ports which modern PCs offer (and, frankly, very few users fully employ). And, addressing the 'dancing with the devil' comment I made at the beginning of my print article, Via promises to guarantee much-longer-than-PC-market-tradition longevity for the CX700. EDN Executive Editor Ron Wilson did a write-up on the CX700 during ESC, which I'd encourage you to peruse.
I'd hoped to be able to provide you benchmarking results on a system based on Via's VT-310DP in this blog post. However, a combination of longer-than-expected procurement delays for other system building blocks and an abundance of away-from-office business travel has to date thwarted my plans. Keep an eye on Brian's Brain for a future post with this data; Via has also promised me a single-CPU EPIA EN board based on the company's latest-generation C7 CPU and CN700 chipset, which I also plan to build up and benchmark.