FPGA Gurus

I'm pleased to see that Jim Tully, vice president of Gartner Inc., sees FPGAs, and specifically semiconductor IP for FPGAs, as one of the first markets to recover from the 2008-09 Big Freeze.  Tully's speech in early December at the Electronic System Design & Reuse conference in Grenoble, as reported by Anne-Francoise Pele in EE Times Europe, pointed out that new designs utilizing FPGAs will begin several quarters before the economy recovers.  Thus, the uptick in design starts can be taken as a rough barometer for improving conditions.

Tully's analysis makes sense, provided certain caveats are taken as givens: The global economy, including the technology sector, has not bottomed out.  It will probably hit a point in late winter of 2009 where the movement of currency and commercial paper all but halts.  This will make it difficult for some businesses in every sector of the economy to continue as going concerns.

The lack of certainty on an economic "thaw" will make it tough for product planners in OEMs to decide when to launch a design start.  Even if consumers are prepared to buy a new generation of iPhone, will distributors and resellers be ready for supply chains to begin moving?  How will decisions on inventory vs. just-in-time manufacturing affect the call on when to put engineering design teams to work?  My gut feeling is similar to Tully's -- significant design starts may begin in the fourth calendar quarter of 2009, even if business conditions continue to look flat.  But the chill in commercial lending could scare off product developers, and we must prepare for a case of FPGA design starts themselves being delayed until mid-2010.  This would mean conditions in the overall economy, even in the technology sector, would not pick up from an end-user perspective for almost two years.  Here's hoping for the new year that the optimistic scenario is correct.