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Loring WirbelAnalyst Loring Wirbel covers programmable logic from an application perspective, providing a sneak peek at the vertical applications that help drive FPGA complexity, performance, and density. The blog will feature videos allowing engineers to spotlight their latest designs, along with news of products and corporate trends at FPGA vendors and the developers of third-party tools for programmable logic.



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Tuesday, September 8, 2009

Discerning the CPLD play in entertainment and consumer devices

Sep 8 2009 8:56AM | Permalink |Comments (0) |


We’re getting so spoiled these days, the mere mention of consumer markets brings to mind the highest-performance FPGA in a company’s portfolio. Since gaming platforms are migrating to broadband multi-user monsters, doesn’t it make sense that the key to exploiting such a market is a Virtex or Stratix with the fastest transceivers available, and perhaps an embedded RISC core for management?

Not necessarily. Lattice Semiconductor Corp. is introducing eight separate reference designs this week, centered on use of the ispMACH CPLD and POWR605 power-management controller, all aimed at the small-footprint, low-power applications in gaming consoles, LCD displays, and set-top boxes. The reference designs associated with these devices cover basic network and interface functions such as SPI and I2C.

This focus fits with the reality that Lattice’s launch of ECP high-end FPGA families has given it respectable options at the high end, but CPLD devices remain a critical revenue stream in the company.  And this sector is not showing signs of obsolescence even as more applications emerge for high-end FPGAs.

In fact, I’ll have more to say in a week or so about new types of power-control competition emerging for the CPLD. We’ve known for some time that some of the most important activity in embedded industrial networking takes place at speeds and feeds that the IT industry has snubbed as old-fashioned. But even in market applications at the cutting edge of new designs, competition remains tight for sockets that implement the functions some would see as routine. Sometimes, routine can represent bread and butter.


Related entries in: FPGA Gurus | Power Sources/Controllers | Programmable Logic | 


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