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Loring WirbelAnalyst Loring Wirbel covers programmable logic from an application perspective, providing a sneak peek at the vertical applications that help drive FPGA complexity, performance, and density. The blog will feature videos allowing engineers to spotlight their latest designs, along with news of products and corporate trends at FPGA vendors and the developers of third-party tools for programmable logic.



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Wednesday, November 18, 2009

Convey touts a "both-and" approach for HPC

Nov 18 2009 9:29AM | Permalink |Comments (2) |


Remember Convex Computer Corp.? The Richardson, Texas company helped put Vitesse Semiconductor Corp. and gallium-arsenide ASICs on the map in the late 1980s, by using III-V-based gate arrays in a supercomputer. Now, of course, Vitesse is still around (albeit as a CMOS house), but Convex was swallowed by Hewlett-Packard in 1995, GaAs is relegated to a few small tasks, ASICs are waning away, and the supercomputer as commonly defined has given way to the High-Performance Computing (HPC) world of systems that are usually rack-based inhabitants of server data centers.

Some of the Convex founders (Steve Wallach and Bruce Toal, primarily) stayed in Richardson and launched Convey Computer Systems, a company that is showing a “hybrid-core” computer at this week’s Supercomputing 2009. The concept is to use Intel Xeons and follow-ons as the primary integer engine, and to use three separate types of Virtex-5 devices in coprocessing. One of those three, the LX330, is used in a bank of four devices for application engines. These are user-programmed for such applications as financial, CAE, automotive, etc. The other two FPGA uses involve LX110s for crossbar switches, and LX155s for memory controllers.

At the conference this week, Convey CEO Bruce Toal told Computerworld that, if HPC potentials were as dire as Intel CTO Justin Rattner claimed, his company would not have been able to raise $40 million in venture capital, at a time when most VCs are hardware-averse. I can buy that, but I also accept Rattner’s argument that HPC software developers must look for unique realms in 3D and visualization where traditional server developers will find it hard to catch up.

Now that Convey has placed its CPU/FPGA combo in a rack-mounted form factor, it can be attacked by an OEM and/or systems integrator creating pre-configured solutions for vertical industries. Our last post on ETI and Pico Computing is a perfect example. If I am working on financial risk analysis, do I reach for Convey due to its ability to configure for a range of applications, or do I go for a pre-crafted ETI/Pico solution? In academia, the answer may favor a Convey hybrid core. But in vertical applications within business worlds, Convey may have to fight for rack space with other companies not commonly considered HPC specialists.  It will be an interesting race for space in the data center.

 


Related entries in: Computers, boards, buses | FPGA Gurus | Programmable Logic | 


Reader Comments



at 11/19/2009 12:13:03 PM, Andy T said:
How much of that $40M in VC money came, "in this economy and outlook", from the Xilinx fund, Loring? - I seem to recall Convey was seeded with Xilinx VC money which is one of the key reasons the machine is swimming in Xilinx parts.....



at 11/24/2009 5:19:39 AM, B.S.Choudhary said:
Thank You!

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