Skip navigation

Zibb

EDA Graffiti

EDA GRAFFITI, WITH EDA VETERAN PAUL MCLELLAN, DIGS INTO THE WORLD OF DESIGN TO FIND OUT HOW WE GOT HERE, WHERE WE ARE GOING, AND WHY EDA IS DIFFERENT.



   Advertisement

Saturday, October 17, 2009

New World Synphony

Oct 17 2009 12:00AM | Permalink |Comments (2) |


It was only a couple of weeks ago that I was writing about software-signoff and FPGAs. I mentioned that Synopsys didn’t really have any high-level synthesis. Rumor has it that they do have sequential formal verification in development. Anyway, on Monday they announced Synphony which they position as high-level synthesis. Synopsys has musical product names now, not just Cadence.

Unlike other high-level synthesis it doesn’t start from C or C++ or SystemC. It starts from M, which is the language used within Matlab, the system development environment of The Mathworks. A lot of system design, especially in radio and automotive, is done using Mathworks products. They are a private company with a huge number of seats that sell at that intermediate price point which seems cheap for an EDA tool but expensive for a PC tool. More than Photoshop but less than Verilog. They also distribute their software widely within universities. As a result, M and Mathlab (along with various associated products like Simulink) are the primary tool today for algorithm exploration.

I think that this is worth looking at for a couple of reasons. First, it is another step towards the new world where more and more design is done at levels disconnected from chip design by people who don’t think of themselves as chip designers. And then automated tools reduce this to RTL and then to an FPGA (or gates).

The second thing worth looking at is The Mathworks themselves. They are selling at a low price point, rumored to be very profitable, sell an enormous number of licenses and are firmly on the cutting edge of technology. IC design automation can’t do this, of course. There just aren’t enough designers. But once you start to think of FPGA as being the implementation of choice, after all “almost all” designs will be FPGAs going forward, it’s not clear that is true. The low end “fred in a shed” FPGA design is never going to invest in tools. But the big new FPGA designs need powerful tools just as much and, in aggregate, will be a big market.

Somewhat on a similar note, at ICCAD Jim Hogan and I will be talking about  “How EDA needs to change” which, surprise, will tie into this theme. It will be in the Silicon Valley Room at the DoubleTree at 3pm on Monday November 2nd. See you there.

Reader Comments



at 10/21/2009 11:57:04 PM, Sean Murphy said:
This is not your father's ICCAD, I was delighted to see that the keynote by Hamid Pirahesh of IBM on the "Impact of Cloud Computing on Extreme Scale Analytics Platforms" will also be broadcast (as a webcast, see www.iccad.com/2009/webcast.html )

I don't see this talk on the ICCAD website, is it part of the regular program? You should tape and post the audio your talk, it sounds very interesting.

A couple of thoughts:

1. "Fred in a shed" would seem to be an ideal candidate for a set of SaaS tools to get an FPGA done.

2. Mathworks Matlab would seem to offer a number of greenfield opportunities for timing analysis, power analysis, register management, global (meaning different teams around the world collaborating on a common design) design/configuration management, and chip assignment/floorplanning that would span M and RTL (if not gate in several cases).

3. I am very curious what you and Jim will come up with to reverse the 6 quarter revenue decline in EDA and help the industry to start growing the pie again.

twitter.com/skmurphy



at 11/12/2009 2:58:58 PM, Confused ASIC Designer said:
Paul - You say Synopsys' new MATLAB synthesis product is "worth looking at" ... but I heard a few weeks ago that Xilinx, who bought a company called AccelChip so they would have the exact same product Synopsys just released, had just put that product (AccelDSP) on end-of-life. A comment was on EDA Graffiti - that's how I heard.

I'm totally confused!!

Xilinx spent $21M to buy AccelChip ... several years later found out they had no interested users even though they own 50+% of the market - and even if the tool was almost free no one wanted it - so they shut it down.

Now Synopsys is acting like the same product is a great thing and will have wonderful benefits to the ASIC design community!

Huh???

Does Synopsys believe Matlab is important for ASICs and that's why Symphony will be a success? I thought this was really a Synplicity product = FPGA focused ... another blog on EDA Graffiti says Symphony is their FPGA tool SynplifyDSP upgraded.

Most all ASIC designers I know use SystemC or some other form of C. Matlab is mostly found to be used by algorithm developers (ie not hardware designers) and they desire to have their algorithms in FPGAs for prototyping. But evidently even this market wasn't big enough for Xilinx to continue to invest in ...

There is too much of this EDA BS out there ... can you straighten this out for us confused ASIC designers who occassionally raise our heads above the walls of our cubes? It's too scary ... lies, lies,
and more lies from EDA vendors.

Just because Synopsys says something doesn't mean it is true. I'd sure like to hear from some real ASIC designers who use MATLAB ... is Symphony really compelling or to be ignored like Xilinx's AccelDSP?

Thanks


Post a comment



Display Name

Change Image
Before submitting this form, please type the characters displayed above.
Note the letters are NOT case sensitive.


ADVERTISEMENT

About Us   |   Contact Us   |   Free Email Newsletters   |   Free Magazine Subscription  |   Advertising   |   RSSRSS   

©1997-2009 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy

Please visit these other Reed Business sites