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EDA GRAFFITI, WITH EDA VETERAN PAUL MCLELLAN, DIGS INTO THE WORLD OF DESIGN TO FIND OUT HOW WE GOT HERE, WHERE WE ARE GOING, AND WHY EDA IS DIFFERENT.



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Friday, October 23, 2009

TJ Rodgers and the PSoC

Oct 23 2009 11:58AM | Permalink |Comments (7) |


I was at the ARM developer conference this week. Actually it has been renamed and is now called Techcon3, which seems pretty generic as branding. Anyway, one of the keynotes was by TJ Rodgers who started off by telling us more than we wanted to know about how he is using software and hardware to try and make the new world’s best pinot noir (he’s conceded that DRC is too hard to beat, but that’s old world). However, there was a serious point: he used Cypress PSoCs (programmable systems on chip) to implement the hardware, which was a use not envisaged when the hardware was designed.

Originally Cypress got into the PSoC business by accident. They decided to take a USB controller they had built (which cost 25c to make and sold for 50c) and use the basic technology to attack the microcontroller market. With the programmable hardware they felt they could create the 5000 different parts required for that market using just 6 chips. Technically this worked but economically it made no sense since the only way to displace an existing microcontroller was to compete on price, which was the problem they were trying to avoid in the first place. So they realized that replacing microcontrollers was a bad idea. But then they discovered that the chips could be used for a wide variety of other applications and they started to sell. To date Cypress has sold over 500 million of them and on track for a billion.

So how come they are being successful entering a market 25 years late? I have to admit I didn’t know these products existed. The closest thing I was aware of are FPGAs with on-chip processors, which allow you to combine generic gates with software.

I’ve talked lots of times before about how semiconductor economics means that leading edge processes can’t be used for most designs without some form of aggregation. A 45nm chip is so expensive to bring to production that you’d better want 50 million of them, and since you probably don’t have the luxury of having the market to yourself that means you probably need to be in a market of 200 million units or more. But outside of a few obvious markets such as cell-phones there just aren’t many markets that big. The most obvious form of aggregation is the FPGA, completely generic. However, there is still valley of death where the volume is too high to make FPGAs economic but not high enough to make designing a special purpose chip economic.

The PSoC seems to slip into this valley. It has a processor (the latest Cypress one has an ARM Cortex on it), programmable digital logic that can be used to build a range of digital peripherals, programmable analog parts that can be hooked up into a wide variety of analog inputs, and programmable I/Os. So, one example application was hotel room door locks (the card operated ones), which used to require 90 components and an ASIC, and can be replaced with 28 components and a standard part PSoC. Apart from the reduction in component count, a standard product like this is almost certainly cheaper than the ASIC and certainly much cheaper to design. Not to mention, since it is all software programmable including the hardware, it can be changed right up until the last minute (or even be field upgradable).

Further, in addition to statically assigning the hardware it can be changed dynamically. Another example: a Coke machine that for all except a few seconds in the middle of the night runs the machine, then for a few second reconfigures itself into a modem and communicates back to base to report if the machine needs refilling.

TJ Rodgers's theme was that you can use a PSoC to solve problems you didn’t know existed for people you’ve never met. But I think another theme is that you can solve problems for markets that are too small to justify the investment of building a specialized chip, which increasingly is almost all of them. Each market may be only moderately large but in aggregate they are enormous. There has been a lot of discussion of platform-based design but most of it has just been trying to get some standardization into wireless design (especially TI’s OMAP platform). Based on just 45 minutes of hearing about it, the PSoC seems like some sort of sweet spot in terms of efficiency and flexibility.

Reader Comments



at 10/23/2009 2:41:08 PM, SteveM said:
Question: what is the difference and tradeoff between PSOC and a core based FPGA ? I guess a PSOC does not have any field programmable hardware, just software programmed. The trend to less ASSP's and more FPGA/PSOC's seems pretty clear, I just don't know if it is a two separate category/segments or just one.



at 10/23/2009 2:49:29 PM, Jim said:
Good question...from what I can tell, the PSOC is much smaller (and compared on DigiKey's website, much cheaper) than an FPGA. According to the datasheets on cypress' website, it also sports a programmable digital fabric that looks much like an FPGA, just smaller--in TJ's keynote he mentioned an equivalent gate-size of about 20,000 gates for the new devices PSOC3 and PSOC5. Finally, I think the biggest difference between the PSOC and an FPGA has got to be the analog--20bit ADCs, 1MSPS ADCs, DACs, etc...that's pretty impressive!



at 10/23/2009 2:58:53 PM, lefty said:
I've been reading about these new PSoC 3 and PSoC 5 chips. Both sound really cool. I can't wait to get my hands on the one with the ARM Cortex-M3. I already know of several designs where this chip will help me eliminate components.



at 10/26/2009 4:40:25 PM, George Saul said:
Think of PSoC as a Smart FPGA. An "FPGA-Plus"

Plus Non-volatility
Plus Programmable analog
Plus Low Power
Plus Flexible clocking and voltages
Plus an MCU
And Plus lower cost



at 10/26/2009 6:35:54 PM, garydpdx said:
Is anybody familiar enough with LSI's former RapidChip product, which was labeled as 'Structured ASIC'? The PSoC strikes me as leaning more towards FPGA, while the LSI offering was meant for hardened implementation once the platform is configured. Are my impression correct?



at 10/26/2009 7:42:02 PM, Golden Chiu said:
Does it support TDM(2.048MHz) Interface



at 11/4/2009 6:29:28 AM, Ralf from Future said:
The big advantage of PSoC3/5 is the Creator Software. It is close to a MCU design flow instead of a FPGA design flow. This makes it very easy to start.
In later version you also will be able to integrate Verilog for the UDB programming.

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