Leibson's Law

Yesterday, I moderated a panel on green chip design in Newport Beach at the 7^th International SOC Conference. Chances are you didn’t see or hear any of it because there were only 100 people at this conference in total. That’s really too bad because we had a great set of panelists:

1. Michel Laurence co-founded Octasic, which is a Montreal specialist in echo cancellation and has mastered the art of self-clocking or self-timed (asynchronous) logic design.
2. Jauher Zaidi, CEO, PalmChip Corporation, which was in the chip-design business but has now spun off those activities to focus more on SOC platform software.
3. Alan Ruberg, SPMT architect for SPMT, The Serial Port Memory Technology consortium, which is developing a high-performance, low-power, next-generation memory interface to replace the DDR families

The title for this blog is “borrowed” from a Mark Twain story and the content is borrowed—once more—from my favorite Oz video celebrity engineer, David Jones, who does the EE Video blog. In our latest episode, David rants about Microchip’s new PICkit 3 development tool.

...Read More

After 40 years of working on phase-change memory (PCM), researchers announced...another incremental step towards creating devices that can compete with the current king of the non-volatile memory hill: Flash EEPROM. Certainly, there are PCM devices on the market now (see this blog and this one). However Flash memory, already the cost/bit memory leader by far, has threatened to leave all other memory technologies far, far in the dust as it evolves from single-layer cells (SLC) to multi-layer cells (MLC). But there’s trouble visible on the far horizon for Flash memory. The number of electrons stored in a Flash cell drops with each new lithography node and we w...Read More

I’ve just started to write a blog for AgigA Tech, a maker of non-volatile memory subsystems for embedded systems and servers. Today, I posted a fun blog entry with a bunch of photos of leaking batteries destroying the equipment in which they’re installed. Seemed like a good Halloween treat, and a reminder to check your batteries and your assumptions about them. You’ll find the post here. My good friend and AgigA Tech CEO Ron Sartore calls the photos absolutely “Joule-ish.” Funny, they don’t look Joulish to me.

You may be aware that a Northwest Airlines commercial flight overflew its destination, Minneapolis-St. Paul International Airport, by 150 miles last week taking the 144 passengers on a bit of a joyride. Worse, the radio silence caused NORAD to scramble fighter jets from two separate locations, just in case the airliner had been hijacked by terrorists. I’ve just read of the reason for the overshoot, courtesy of CNN. The pilot and copilot were both engaged in working on their laptop computers and didn’t notice that it was time to land. The aircraft was on autopilot while the copilot was reportedly showing the pilot something related to crew scheduling on his laptop. The pilot’s laptop was also reportedly in use.

It’s not clear to me...Read More

I'm chairing a panel on Green Chip design at the 7th International SOC Conference next week. What would you ask the panelists about green ASIC/FPGA design if you were there? Here's a list of panelists:

“Green Chips: Technology, Trends, and Challenges in Low-Power Multicore SoC Designs” (http://j.mp/1D0hfW)

1. Dr. Barry Pangrle, Solutions Architect, Low Power, Design and Verification, Mentor Graphics.

2. Dr. Sho Long Chen, President, CEO, Founder and Chairman, Vweb Corporation

3. Michel Laurence co-founded Octasic.

4. Jasbinder Bhoot, Vice President, Worldwide Marketing, eASIC Corporation.

5. Jauher Zaidi, CEO, PalmChip Corporation

6. Alan Ruberg, SPMT architect for SPMT, The Serial Port Memory Technology consortium.

The IEEE Consultants Network of Silicon Valley is holding the second of three 3-hour Webinars on the topic of successful selling as a business consultant. (I reviewed the first such Webinar here.) Again, the speaker is the immensely knowledgeable Mike Johnson and the price is a paltry $49 if you’re an IEEE member. Go here to register. If you’re a consultant, even an experienced and successful one, you should register for this event now. I can guarantee that you will make back 100x the cost of the Webinar if you apply Johnson’s principles.

Nine years ago, on August 28, 2000, after visiting the Intel Developers Forum (IDF), I published these words in the Microprocessor Report about what was then Intel’s XScale processor: “On day two of IDF, Intel launched its new name for StrongArm-2—XScale—and at long last demonstrated working silicon. The new name refers to the processor's "extraordinary ability to scale," which it indeed has. (Unlike the old name, the new name also is one that Intel can trademark.) The early XScale silicon at IDF ran at 50MHz while consuming 10mW and at 1GHz running at 1.5W. The very same piece of silicon operated at both extremes, although the more conservative data sheet will span only 50MHz at 10mW to 800MHz at 900mW. Incidentally, standby power is 0.1mW and XScale jumps from standby to full operation in less than 20µsec.”

Six years...Read More

• Do you design ASICs or SOCs?
• Do you work on a team that designs ASICs or SOCs?
• Do you manage a team that designs ASICs or SOCs?

Let me ask you a question then. What’s the one thing you will do from now to the end of the year that will put you or your team ahead of the rampant, cutthroat global competition it will face in 2010? Do you even know?

Let me give you the typical answer, the answer that I know I’d get from most of the engineers, designers, managers, and executives in this industry. It’s a one-word answer. I know it because I’ve heard this answer over and over again. That answer is... nothing.

What!?!?!

Absolutely, positively nothing.

The depressing reality of the SOC design industry is that it has been on cruise control for years. It’s been on...Read More

There seem to be a lot of people interested in SSDs reading this blog, so I’m letting you know about an upcoming SSD seminar series put on for free by distributor Bell Micro across the US and Canada. Here’s the official description:

This series will take place in October and November 2009 in urban centers across North America and is focused on the theme “The State of Solid State.” Presentations will underscore the innovative features, capabilities and benefits of SSDs, including a look at total cost of ownership and detailed technical knowledge.

Other presentations will be made by leading SSD suppliers and Bell Micro partners Intel, Pliant, STEC and Western Digital. Each company will give detailed presentations on their products and will be available to help attendees incorporate SSDs into their d...Read More

EDAC, the EDA Consortium, is sponsoring a mixer this week for people in EDA. It’s going down at the Faultline microbrewery in Sunnyvale. Here are the details:

• Date: Thursday, October 15, 5 - 7 PM
• Location: Faultline Brewery
• 1235 Oakmead Parkway (Lakeside Drive/Oakmead Parkway)
• Sunnyvale, CA

Can’t make it this week? There are two more mixers scheduled for November 19 and December 17. Sparkplugs Michelle Clancy at Cayenne Communications and David Lin at Denali ask you to spread the word.

NASA demonstrated pinpoint perfection of its new lunar-crashing technology early this morning by first crashing a Centaur final stage booster into the moon, followed closely by the LCROSS Lunar CRashing scientific platform. All kidding aside, the two lunar impacts are designed to further explore the amount of water on the moon. The impacts kicked up debris from craters perpetually in shadow, likely places for hard-frozen water. Spectrographic analysis of the debris will determine how much water there was in the vicinity of the impact sites. Thus we will soon know whether or not there’s some Popsicle mixed in with the green cheese.

OK, fellow SF buffs. Popular Mechanics has ranked the 10 most prophetic SF films of all time. In reverse order, they are:

#10. 2001: A Space Odyssey

#9. Short Circuit

#8. Soylent Green

#7. Blade Runner

#6. The Running Man

#5. Destination Moon

#4. The Truman Show

#3. The Road Warrior (Mad Max 2)

#2. Minority Report

#1. Gattaca

So, did PopMech get it right? Which prophetic SF film do you believe they missed?

Even though it’s an obvious technological slam dunk, the fusion of FPGA fabrics with microprocessor architectures on one slab of silicon has a checkered history. Often it seems, either the wrong processor architecture ended up on the silicon or the grafting of the FPGA fabric to the processor’s buses seemingly failed to knit properly. In any case, FPGAs with on-chip hard IP processor cores have not set the world on fire. In addition, although FPGA fabrics can be used to implement soft-IP processors, the result is a lot like trying to teach a pig to sing. The synthesized processors run very slowly, primarily because of the extreme routing congestion around the processor’s register file. The hand-optimized processor cores offered by the major FPGA players are useful and faster, but they're not especially powerful. Microprocessor cores are about four times faster w...Read More