Leibson's Law: It takes 10 years for any disruptive technology to become pervasive in the design community. This blog is about the disruptive technologies that either have or will win over electronic engineers, some that won't, and why. Please feel free to link to these blog entries! Written by Steve Leibson, a marketing consultant specializing in lead generation and content creation for high-tech companies, former VP of Content for Reed Business, and former Editor in Chief of EDN. See my consulting Web site at www.sleibson.com and my history site at www.hp9825.com. You can email me at steven.leibson followed by the magic email symbol @ followed by att.net.
Oct 19 2009 9:44AM | Permalink |Comments (1) |
Nine years ago, on August 28, 2000, after visiting the Intel Developers Forum (IDF), I published these words in the Microprocessor Report about what was then Intel’s XScale processor: “On day two of IDF, Intel launched its new name for StrongArm-2—XScale—and at long last demonstrated working silicon. The new name refers to the processor's "extraordinary ability to scale," which it indeed has. (Unlike the old name, the new name also is one that Intel can trademark.) The early XScale silicon at IDF ran at 50MHz while consuming 10mW and at 1GHz running at 1.5W. The very same piece of silicon operated at both extremes, although the more conservative data sheet will span only 50MHz at 10mW to 800MHz at 900mW. Incidentally, standby power is 0.1mW and XScale jumps from standby to full operation in less than 20µsec.”
Six years later, Intel sold its XScale designs and business to Marvell, which continued to market existing Intel-designed XScale processor chips like the PXA255. Marvell claims to have 1000 people working on new XScale designs and the company has just unleashed a broad line of integrated processors based on the latest versions of this ARM-based processor core. The product line is called the ARMADA family and it consists of several sublines including the 100, 500, 600, and 1000 series. Devices in all ARMADA series are currently in the sampling stage.
The 100 and 1000 series chips are based on Marvell’s ARM v5 core design called Sheeva PJ1. The 100 series devices are single-core chips and the 1000 series devices are dual-core chips. The 500 and 600 series devices are based on an ARM v7 core design called Sheeva PJ4. All devices are manufactured with TSMC’s 55nm fabrication processes. The 100, 500, and 1000 series devices are manufactured in the mainstream G process and the 600 series, designed to target Smartphones and MIDs, is manufactured with the low-power LP process. Of course, Marvell has the option of manufacturing other ARMADA family members in the low-power process as well.
I could write a lot of words describing the various features of the devices in these ARMADA series parts, but instead I’m just going to reproduce the feature chart Marvell supplied because you’ll better see the broad feature range of the entire Marvell processor ARMADA:

Here are the markets Marvell believes are appropriate targets for the various ARMADA series:
In high volumes, devices in the ARMADA 100 series start at less than $10. Prices go up from there. In all, Marvell’s ARMADA series represents a broadside into the embedded computing, consumer, wireless, and handheld markets.
And just in case you don’t often think of Marvell in these markets, consider this: Amazon’s first Kindle ebook reader—introduced at the end of 2007—was based on the original Intel PXA255 XScale processor, supplied by Marvell.
Related entries in: Application Specific Processors | Microprocessors | Processor Architecture |