Leibson's Law: It takes 10 years for any disruptive technology to become pervasive in the design community. This blog is about the disruptive technologies that either have or will win over electronic engineers, some that won't, and why. Please feel free to link to these blog entries! Written by Steve Leibson, a freelance content creator and marketing/lead-generation consultant specializing in high-tech companies, former VP of Content for Reed Business, and former Editor in Chief of three publications including EDN. See my consulting Web site at www.sleibson.com and my history site at www.hp9825.com. You can email me at steven.leibson followed by the magic email symbol @ followed by att.net.
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Blog
Tuesday, July 10, 2007
Free EDN Webcast: Low-Power SOC Design
Jul 10 2007 10:21AM | Permalink |Comments (0) |
Need to design SOCs that maximize performance for every microJoule? I’ll be conducting a free Web seminar next week (Wednesday, July 18) on the topic of configured microprocessor cores that help accomplish this objective by greatly reducing the number of cycles needed to execute a task without the need to use manually coded RTL hardware blocks or assembly-language programming. I’ll be explaining these concepts in depth by exploring the abilities of configurable processors and through three specific, detailed task examples (AES encryption, Viterbi decoding, and FFTs) that benefit from this design approach.
Key points you'll learn:
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Configured processor cores can reduce task energy consumption by more than 10x
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Many types of tasks can be accelerated using processor configuration
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Configured processor cores reduce manual RTL coding and verification in low-power applications
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Buses are not the ideal choice for low-power, on-chip interblock communications
Register here.
Related entries in: ASICs | Processors | SOC (System on a chip) |
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