Spice files for CMOS IC design

R. Jacob Baker has published two sets of SPICE examples from CMOS design textbooks on line. Take a look at this swell matrix of Spice examples spread across versions that work on LTSpice, Cadence and Electric VLSI design environments. The two Cadence headings also call out Cadence on the MOSIS fab, those folks being the people that will make prototype chip for you by combining your mask with dozens of others so you share the mask costs. I think you could get an IC made for 10 to 20 grand with this setup. And also check out Mr. Baker’s page with videos about LTSpice from Linear Technology. Note the Jakester’s comments about LTSPice here, although he neglected to point out that we Silicon Valley denizens call Mike Engelhardt “Panama Mike” due to his stylish fedora. Jacob also points to a Windows IC layout tool, Lasi, written by Dr. David E. Boyce. You can complement this with another open-system free-information advocate, my buddy Don Sauer, who worked at National Semiconductor long enough to get 35 patents. Don’s website is full of very detailed tools, tips, and stories that will help you design analog ICs as well.