Analog IC designer needs a job
I love my former employer National Semiconductor but one of the dumber things they have ever done is to institute a ranking system where managers have to fire a percentage of their employees every year even if the employee is doing well. My pal Saurabh got caught up in this madness and lost his job last month. The real tragedy about this is that Saurabh is here on an H1B visa and if he does not get a job in a few months he and his lovely new bride will have to go back to India, where he can work for companies competing against American companies while he pays taxes to India instead of this United States.
I got to be Saurabh’s friend when he transferred into the amplifier application group where I worked along with Bob Pease and Paul Grohe. Saurabh had been an IC designer in a wireless group that National had shut down. I admired him because he got just as much enjoyment from doing applications as he did from doing RF IC design. One thing that impressed me was his curiosity. I showed him schematic capture, PSPICE and board layout in Orcad and in a matter of months he was designing and laying out his own boards, with great results. Then he transferred over to the IC design group in amplifiers where he worked under the wing of experienced designers, eventually making a variation of one of their designs and releasing a chip.
It speaks to his character that when I talked to him last week the thing that upset him most was not that he got laid off just before Thanksgiving or that he might get deported. “My new silicon was due back in two weeks!” he complained. He was heartbroken that he was not going to be able to characterize the part. Yes, Saurabh is one of those rare analog IC designers that actually likes to work in the lab, as opposed to tossing a simulation over the wall and letting other people layout the chip and evaluate the silicon.
To understand what a stupid thing laying him off was, you can look at his credentials. He went to the Indian Institute of Technology, Delhi, the one that 60 Minutes did a special on, pointing out that if the parents couldn’t get their kid into New Delhi, they would send them to a “second tier” school like Stanford, MIT or Cal Tech. In addition, Saurabh took advantage of his Silicon Valley location to get an MS from Stanford a couple of years ago. Once again, his sentiments about the experience reveal much about his good character. He wrote me:
Did some really nice courses there. There was one, my pride and joy, a lab course in which we made an LNA and a VCO using lumped components. Lucked out with a smart lab partner, and made a peach of a circuit (400-600 MHz VCO with -122 dBc phase noise @ 100 kHz). My partner was the smarter one and opted to take the project report with him. I, being the sentimental one, wanted the circuit to keep and feel good about. Will show it to you sometime…
So one of the smartest guys I have worked with is giving credit to his lab partner? Wow, an analog IC designer that has humility, you don’t see that very often. Saurabh used the Cadence design environment at National and I have mentioned that he is a fast learner so he got up on PSPICE and Orcad in no time. I suspect he can do anything that is thrown at him. If you have any sense, write me and I will send you a copy of his resume and his email address and you can take it from there. Hurry though; I suspect he won’t be on the job market for long. Write me a paul.rako[at sign here]edn.com
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