Bias JFET with a diode in the source leg
December 31, 2008
Electronic Design has a nice Idea for Design where a fellow puts a diode in the source leg of the JFET to raise the bias point by a diode drop. He just ties the gate to common, so it is a normally self-biased JFET except the bias has been moved from IDSS to a point where the diode drop adds in 0.7 volts or so and puts the Vgs to –0.7 volts.
Posted by Paul Rako on December 31, 2008 |
Comments (2)
January 20, 2009
In response to:
Bias JFET with a diode in the source legBrad Wood commented:
January 20, 2009
In response to:
Bias JFET with a diode in the source legKlave commented:
Advertisement
Advertisement
Advertisement















